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95ee2897 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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0600af1f |
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03-Jun-2022 |
Andrew Turner <andrew@FreeBSD.org> |
Make SMCCC usable by device drivers To allow device drivers to call into SMCCC we need to initialise it earlier. As it depends on PSCI, and that is detected via ACPI or FDT move the call to smccc_init to the PSCI driver. Add a function for drivers to read the smccc version, or 0 if smccc is not present.
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7a58bf04 |
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26-Sep-2022 |
Wei Hu <whu@FreeBSD.org> |
arm64: Enabling new hypercalls using HvCallSetVpRegisters and HvCallGetVpRegisters Enabling HvCallSetVpRegisters and HvCallGetVpRegisters for hypercalls to read and write to specific MSRs. This is required for implementing wrmsr and rdmsr, which is required for Hyper-V vmbus driver for ARM64. Also we need to use arm smccc hvc 1.2 version as we need to access registers beyond X0-X3 for HvCallGetVpRegisters. Currently scoping it only for Hyper-V. Reviewed by: lwhsu, andrew, whu Tested by: Souradeep Chakrabarti <schakrabarti@microsoft.com> Signed-off-by: Souradeep Chakrabarti <schakrabarti@microsoft.com> Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D36256
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7722d8c7 |
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13-Sep-2019 |
Ruslan Bukin <br@FreeBSD.org> |
Add generic arm/arm64 secure-monitor SMCCC interface and switch PSCI code to use it. This interface will also be used by Intel Stratix 10 platform. This was not tested on arm due to lack of PSCI-enabled arm hardware lying around. Reviewed by: andrew Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D21439
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100a6d19 |
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31-Jul-2018 |
Andrew Turner <andrew@FreeBSD.org> |
Use int for the pcpu_ssbd argument. This is included from userland and may not include the needed headers to get the bool definition. Reported by: manu Pointy hat to: andrew Sponsored by: DARPA, AFRL
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0594061e |
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30-Jul-2018 |
Andrew Turner <andrew@FreeBSD.org> |
Implement the SSBD (CVE-2018-3639) workaround on arm64 This calls into the Arm Trusted Firmware to enable and disable the workaround for the Speculative Store Bypass Disable (SSBD) issue, also known as Spectre Variant 4. As this may have a large performance overhead, and how exploitable SSBD is is unknown we follow the Linux lead of allowing the administrator to select between always on, always off, or only enabled in the kernel, with the latter being the default. PR: 228955 Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D15819
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95c4b3c7 |
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20-Jun-2018 |
Andrew Turner <andrew@FreeBSD.org> |
Fix the SMCCC signatures, they are all 32-bit calls. This fixes SMCCC version detection. Sponsored by: DARPA, AFRL
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09d1a08d |
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13-Jun-2018 |
Andrew Turner <andrew@FreeBSD.org> |
Add the SMCCC return codes from ARM DEN 0070A. While here add a comment with the document the function IDs come from. Sponsored by: DARPA, AFRL
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f651b525 |
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13-Jun-2018 |
Andrew Turner <andrew@FreeBSD.org> |
Add support for the ARM SMC Calling Convention (SMCCC). This is a method to call into the firmware in a similar way to the existing PSCI, and used PSCI to detect when SMCCC is enabled. There is a function ID space we can use. Currently we only support 3 functions in the ARM Architecture Calls region, however it is expected we will expend these in the future. Sponsored by: DARPA, AFRL
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