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2ff63af9 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .h pattern Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/
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7c509be1 |
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01-Mar-2022 |
Justin Hibbits <jhibbits@FreeBSD.org> |
Mechanically convert if_et(4) to IfAPI Sponsored by: Juniper Networks, Inc. Differential Revision: https://reviews.freebsd.org/D37810
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7282444b |
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20-Nov-2017 |
Pedro F. Giffuni <pfg@FreeBSD.org> |
sys/dev: further adoption of SPDX licensing ID tags. Mainly focus on files that use BSD 3-Clause license. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point.
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5effa159 |
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09-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
FreeBSD driver does not require arpcom structure in softc.
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6f61c828 |
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07-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Consistently use a tab character instead of using either a space or tab after #define. While I'm here consistently use capital letters when it uses hexadecimal notation. No functional changes.
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e0b5ac02 |
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07-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Implement hardware MAC statistics counter. Counters could be queried with dev.et.%d.stats sysctl node where %d is an instance of device.
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1f009e2f |
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07-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Rework link state tracking and TX/RX MAC configuration. o Do not report link status if driver is not running. o TX/RX MAC configuration should be done with resolved speed, duplex and flow control after establishing a link so it can't be done in driver initialization routine. Move the configuration to miibus_statchg callback which will be called whenever any link state change is detected. At this moment, flow-control is not enabled yet mainly because I was not able to set correct flow control parameters to generate TX pause frames. o Now TX/RX MAC is enabled only when a valid link is detected. Rearragnge hardware initialization routine a bit to leave enabling MAC to miibus_statchg callback. In order to that, TX/RX DMA engine is enabled in et_init_locked(). o Introduce ET_FLAG_LINK flag to track current link state. o Introduce ET_FLAG_FASTETHER flag to mark whether controller is fast ethernet. This flag is checked in miibus_statchg callback to know whether PHY established a valid link. o In et_stop(), TX/RX MAC is explicitly disabled instead of relying on et_reset(). And move et_reset() from et_stop() to controller initialization. Controler reset is not required here and it would also clear critial registers(i.e station address, RX filter configuration, WOL etc) that are required to make WOL work. o Switching to current media is done in et_init_locked() after setting IFF_DRV_RUNNING flag. This should ensure reliable auto-negotiation/manual link establishment. o In et_start_locked(), check whether driver got a valid link before trying to send frames. o Remove checking a link in et_tick() as this is done by miibus_statchg callback.
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244fd28b |
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07-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Controller does not require TX start command for every frame. So send a single TX command after setting up all TX frames. This removes unnecessary register accesses and bus_dmamap_sync(9) calls. et(4) uses TX interrupt moderation so it's possible to have TX buffers that were already transmitted but waiting for TX completion interrupt. If the number of available TX descriptor is less then 1/3 of total TX descriptor, try reclaiming first to get enough free TX descriptors before setting up TX descriptors. After r228325, et_txeof() no longer tries to send frames after reclaiming TX buffers. That change was made to give more chance to transmit frames in main interrupt handler since we can still send frames in interrupt handler with RX interrupt. So right before exiting interrupt hander, after enabling interrupt, try to send more frames. This gives slightly better performance numbers. While I'm here reduce number of spare TX descriptors from 8 to 4. Controller does not require reserved TX descriptors, it was just to reduce TX overhead. After r228325, driver has much lower TX overhead so it does not make sense to reserve 8 TX descriptors.
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05884511 |
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07-Dec-2011 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Overhaul bus_dma(9) usage in et(4) and clean up TX/RX path. This change should make et(4) work on any architectures. o Remove m_getl inline function and replace it with stanard mbuf interfaces. Previous code tried to minimize code duplication but this came from incorrect use of common DMA tag. Driver may be still use a common RX allocation handler with additional structure changes but I don't see much point to do that it would make it hard to understand the code. o Remove DragonflyBSD specific constant EVL_ENCAPLEN, use ETHER_VLAN_ENCAP_LEN instead. o Add bunch of new RX status definition. It seems controller supports RX checksum offloading but I was not able to make the feature work yet. Currently driver checks whether recevied frame is good one or not. o Avoid a typedef ending in '_t' as style(9) says. o Controller has no restriction on DMA address space, so there is no reason to limit the DMA address to 32bit. Descriptor rings, status blocks and TX/RX buffers now use full 64bit DMA addressing. o Allocate DMA memory shared between host and controller as coherent. o Create 3 separate DMA tags to be used as TX, mini RX ring and stanard RX ring. Previously it created a single DMA tag and it was used to all three rings. o et(4) does not support jumbo frame at this moment and I still don't quite understand how jumbo frame works on this controller so use two RX rings to handle small sized frame and normal sized frame respectively. The mini RX ring will be used to receive frames that are less than or equal to 127 bytes. The second RX ring is used to receive frames that are not handled by the first RX ring. If jumbo frame support is implemented, driver may have to choose better RX scheme by letting the second RX ring handle jumbo frames. This scheme will mimic Broadcom's efficient jumbo frame handling feature. However RAM buffer size(16KB) of the controller is too small to hold 2 jumbo frames, if 9KB jumbo frame is used, I'm not sure how good performance would it have. o In et_rxeof(), make sure to check whether controller received good frame or not. Passing corrupted frame to upper layer is bad idea. o If driver receives a bad frame or driver fails to allocate RX buffer due to resource shortage condition, reuse previously loaded DMA map for RX buffer instead of unloading/loading RX buffer again. o et_init_tx_ring() never fails so change return type to void. o In watchdog handler, show TX DMA write back status of errored frame which could be used as a clue to debug watchdog timeout. o Add missing bus_dmamap_sync() in various places such that et(4) should work with bounce buffers(e.g. PAE). o TX side bus_dmamap_load_mbuf_sg(9) support. o RX side bus_dmamap_load_mbuf_sg(9) support. o Controller has no DMA alignment limit in RX buffer so use m_adj(9) in RX buffer allocation to make IP header align on 2 bytes boundary. Otherwise it would trigger unaligned access error in upper layer on strict alignment architectures. One of down side of controller is it provides limited set of RX buffer length like most Intel controllers. This is not problem at this moment because driver does not support jumbo frame yet but it may require alignment fixup code to support jumbo frame on strict alignment architectures. o In et_txeof(), don't zero TX descriptors for transmitted frames. TX descriptors don't need write access after transmission. Driver sets IFF_DRV_OACTIVE when the number of available TX descriptors are less than or equal to ET_NSEG_SPARE. Make sure to clear IFF_DRV_OACTIVE only when the number of available TX descriptor is greater than ET_NSEG_SPARE.
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a7d5f7eb |
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19-Oct-2010 |
Jamie Gritton <jamie@FreeBSD.org> |
A new jail(8) with a configuration file, to replace the work currently done by /etc/rc.d/jail.
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e5fdd9de |
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30-Jul-2010 |
Xin LI <delphij@FreeBSD.org> |
Change copyright holder to author. We prefer using a real legal entity for copyright holders. Approved by: sephe MFC after: 3 days
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83e8bd69 |
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21-Dec-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
MFC r199563,199608-199613 r199563: Fix copy & paste error and remove extra space before colon. r199608: Remove unnecessary structure packing. r199609: Add initial endianness support. It seems the controller supports both big-endian and little-endian format in descriptors for Rx path but I couldn't find equivalent feature in Tx path. So just stick to little-endian for now. r199610: Because we know received bytes including CRC there is no reason to call m_adj(9). The controller also seems to have a capability to strip CRC bytes but I failed to activate this feature except for loopback traffic. r199611: Add IPv4/TCP/UDP Tx checksum offloading support. It seems the controller also has support for IP/TCP checksum offloading for Rx path. But I failed to find to way to enable Rx MAC to compute the checksum of received frames. r199612: Add __FBSDID. r199613: Only Tx checksum offloading is supported now. Remove experimental code sneaked in r199611.
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a7053a55 |
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21-Dec-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
MFC r199558,199561 r199558: Use bus_{read,write}_4 rather than bus_space_{read,write}_4. r199561: Use capability pointer to access PCIe registers rather than directly access them at fixed address. Frequently the register offset could be changed if additional PCI capabilities are added to controller. One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe link capabilities register but the location of the register does not match with PCIe capability pointer + offset. I'm not sure it's shadow register of PCIe link capabilities register.
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d44acd73 |
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21-Dec-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
MFC r199553,199556 r199553: Remove extra spce at the EOL. r199556: style(9)
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73e0051d |
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21-Dec-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
MFC r199550-199552: r199550: Remove support code for FreeBSD 6.x versions. r199551: Destroy driver mutex in device detach. r199552: Add MSI support.
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3e05e771 |
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21-Dec-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
MFC r199548: Remove complex macros that were used to compute bits values. Although these macros may have its own strength, its complex definition make hard to read the code. Approved by: delphij
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9955274c |
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20-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Add IPv4/TCP/UDP Tx checksum offloading support. It seems the controller also has support for IP/TCP checksum offloading for Rx path. But I failed to find to way to enable Rx MAC to compute the checksum of received frames.
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bbd5260f |
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20-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Remove unnecessary structure packing.
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d95121b4 |
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19-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Use bus_{read,write}_4 rather than bus_space_{read,write}_4.
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73e338b0 |
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19-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Remove extra spce at the EOL.
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cc3c3b4e |
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19-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Add MSI support.
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23263665 |
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19-Nov-2009 |
Pyun YongHyeon <yongari@FreeBSD.org> |
Remove complex macros that were used to compute bits values. Although these macros may have its own strength, its complex definition make hard to read the code. Approved by: delphij
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d7f03759 |
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19-Oct-2008 |
Ulf Lilleengen <lulf@FreeBSD.org> |
- Import the HEAD csup code which is the basis for the cvsmode work.
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4d52a575 |
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20-Jun-2008 |
Xin LI <delphij@FreeBSD.org> |
Add et(4), a port of DragonFly's Agere ET1310 10/100/Gigabit Ethernet device driver, written by sephe@ Obtained from: DragonFly Sponsored by: iXsystems MFC after: 2 weeks
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