#
685dc743 |
|
16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .c pattern Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
|
#
ab3fad6e |
|
01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
bhnd: clean up empty lines in .c and .h files
|
#
80a7c0f5 |
|
15-Dec-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhndb(4): Enable addrext support on DMA64 devices, and fix an incorrect DMA DMA boundary constraint applied in bhndb_dma_tag_create(). Sponsored by: The FreeBSD Foundation
|
#
eaa5fb4b |
|
27-Nov-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhndb(4): Implement bridge support for the BCM4312 and other PCI_V0 chipsets. Very early (PCI_V0) Broadcom PCI Wi-Fi chipsets have a few quirks when compared to later PCI(e) core revisions: - The standard static BAR0 mapping of the PCI core registers is discontiguous, with siba's cfg0 register block mapped distinctly from the other core registers. - No dedicated ChipCommon register mapping is provided; instead, the single configurable register window must be used to access both ChipCommon and D11 core registers. The D11 core's operational semantics guarantee the safety of -- after disabling interrupts -- borrowing the single dynamic register window to perform the few ChipCommon operations required by a driver. To support these early PCI devices: - Allow defining multiple discontiguous BHNDB_REGWIN_T_CORE register windows that map a single port/region, and producing bridged resource allocations backed by those discontiguous windows. - Support stealing existing register window allocations to fulfill indirect bhnd(4) bus I/O requests within address ranges tagged with BHNDB_ALLOC_FULFILL_ON_OVERCOMMIT. - Fix an inverted test of bhndb_is_pcie_attached() that disabled PCI-only clock bring-up required by these devices. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation
|
#
9ed45324 |
|
21-Nov-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Add support for querying DMA address translation parameters BHND Wi-Fi chipsets and SoCs share a common DMA engine, operating within backplane address space. To support host DMA on Wi-Fi chipsets, the bridge core maps host address space onto the backplane; any host addresses must be translated to their corresponding backplane address. - Defines a new bhnd_get_dma_translation(9) API to support querying DMA address translation parameters from the bhnd(4) bus. - Extends bhndb(4) to provide DMA translation descriptors from a DMA address translation table defined in the host bridge-specific bhndb_hwcfg. - Defines bhndb(4) DMA address translation tables for all supported host bridge cores. - Extends mips/broadcom's bhnd_nexus driver to return an identity (no-op) DMA translation descriptor; no translation is required when addressing the SoC backplane. Approved by: adrian (mentor) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12582
|
#
5ad9ac03 |
|
24-May-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[bhnd] Normalize bhnd(4) device matching API This unifies handling of core, chip, and board-level device matching, and adds support for matching device drivers against the bus attach type (e.g. SoC vs WiFi adapter). Core-level quirks on Broadcom's chipsets generally are specific to some combination of chip model, core revision, chip package (e.g. 12x9 SMT package), SROM revision, etc. Unifying the match APIs for all three attribute types (core, chip, board/srom) allows defining a single device quirk table that matches across all of those attributes. Submitted by: Landon Fuller <landonf@landonf.org> Differential Revision: https://reviews.freebsd.org/D6515
|
#
426a80d4 |
|
05-May-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[bhnd] don't use anonymous unions. Found by: gcc-4.2
|
#
4ad7e9b0 |
|
25-Feb-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
|