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fdafd315 |
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24-Nov-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Automated cleanup of cdefs and other formatting Apply the following automated changes to try to eliminate no-longer-needed sys/cdefs.h includes as well as now-empty blank lines in a row. Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/ Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/ Remove /\n+#if.*\n#endif.*\n+/ Remove /^#if.*\n#endif.*\n/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/ Sponsored by: Netflix
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685dc743 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .c pattern Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
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4d846d26 |
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10-May-2023 |
Warner Losh <imp@FreeBSD.org> |
spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch up to that fact and revert to their recommended match of BSD-2-Clause. Discussed with: pfg MFC After: 3 days Sponsored by: Netflix
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1db163b8 |
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28-Feb-2022 |
Mark Johnston <markj@FreeBSD.org> |
bhnd: Fix some -Wunused-but-set-variable warnings MFC after: 1 week
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ab3fad6e |
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01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
bhnd: clean up empty lines in .c and .h files
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6e778a7e |
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08-Dec-2017 |
Pedro F. Giffuni <pfg@FreeBSD.org> |
SPDX: license IDs for some ISC-related files.
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ac59515b |
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27-Nov-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Fix bcma/siba core reset behavior Add missing support for specifying I/O control flags during core reset, and resolve a number of siba(4)-specific reset issues: - Add missing check for target reject flags in siba_is_hw_suspended(). - Remove incorrect wait on SIBA_TMH_BUSY when modifying any target state register; this should only be done when waiting for initiated transactions to clear. - Add missing wait on SIBA_IM_BY when asserting SIBA_IM_RJ. - Overwrite any previously set SIBA_TML_REJ flag when bringing the core out of reset. This fixes a lockup that occured when we brought up a core (after reboot) that had previously been placed into RESET by siba_bwn(4). Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D13039
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4e96bf3a |
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22-Nov-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): extend the PMU APIs to support bwn(4) The bwn(4) driver requires a number of extensions to the bhnd(4) PMU interface to support external configuration of PLLs, LDOs, and other parameters that require chipset or PHY-specific workarounds. These changes add support for: - Writing raw voltage register values to PHY-specific LDO regulator registers (required by LP-PHY). - Enabling/disabling PHY-specific LDOs (required by LP-PHY) - Writing to arbitrary PMU chipctrl registers (required for common PHY PLL reset support). - Requesting chipset/PLL-specific spurious signal avoidance modes. - Querying clock frequency and latency. Additionally, rather than updating legacy PWRCTL support to conform to the new PMU interface: - PWRCTL API is now provided by a bhnd_pwrctl_if.m interface. - Since PWRCTL is only found in older SSB-based chipsets, translation from bhnd(4) bus APIs to corresponding PWRCTL operations is now handled entirely within the siba(4) driver. - The PWRCTL-specific host bridge clock gating APIs in bhnd_bus_if.m have been lifted out into a standalone bhnd_pwrctl_hostb_if.m interface. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12664
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caeff9a3 |
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21-Nov-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): implement MIPS and PCI(e) interrupt support On BHND MIPS SoCs, this replaces the use of hard-coded MIPS IRQ#s in the common bhnd(4) core drivers; we now register an INTRNG child PIC that handles routing of backplane interrupt vectors via the MIPS core. On BHND PCI devices, backplane interrupt vectors are now routed to the PCI/PCIe host bridge core when bus_setup_intr() is called, where they are dispatched by the PCI core via a host interrupt (e.g. INTx/MSI). The bhndb(4) bridge driver tracks registered interrupt handlers for the bridged bhnd(4) devices and manages backplane interrupt routing, while delegating actual bus interrupt setup/teardown to the parent bus on behalf of the bridged cores. Approved by: adrian (mentor, implicit) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12518
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89294a78 |
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27-Sep-2017 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd: Add support for supplying bus I/O callbacks when initializing an EROM parser. This allows us to use the EROM parser API in cases where the standard bus space I/O APIs are unsuitable. In particular, this will allow us to parse the device enumeration table directly from bhndb(4) drivers, prior to full attach and configuration of the bridge. Approved by: adrian (mentor) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D12510
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ba3eb10d |
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15-Nov-2016 |
Michael Zhilin <mizhka@FreeBSD.org> |
[BHND] correct spelling error in macro name This commit is part of D6920 review. One of macro had wrong prefix: BMCA => BCMA Reviewed by: landonf, adrian (mentor) Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6920
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8a03f98a |
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23-Sep-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Implement common API for IOST/IOCTL register access and core reset - Added bhnd(4) bus APIs for per-core ioctl/iost register access. - Updated reset/suspend bhnd(4) APIs for compatibility with ioctl/iost changes. - Implemented core reset/suspend support for both bcma(4) and siba(4). - Implemented explicit release of all outstanding PMU requests at the bus level when putting a core into reset. Approved by: adrian (mentor, implicit) Differential Revision: https://reviews.freebsd.org/D8009
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824b48ef |
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05-Sep-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Implement backplane interrupt handling. This adds bhnd(4) bus-level support for querying backplane interrupt vector routing, and delegating machine/bridge-specific interrupt handling to the concrete bhnd(4) driver implementation. On bhndb(4) bridged PCI devices, we provide the PCI/MSI interrupt directly to attached cores. On MIPS devices, we report a backplane interrupt count of 0, effectively disabling the bus-level interrupt assignment. This allows mips/broadcom to temporarily continue using hard-coded MIPS IRQs until bhnd_mips PIC support is implemented. Reviewed by: mizhka Approved by: adrian (mentor, implicit)
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111d7cb2 |
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03-Sep-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
Migrate bhndb(4) to the new bhnd_erom API. Adds support for probing and initializing bhndb(4) bridge state using the bhnd_erom API, ensuring that full bridge configuration is available *prior* to actually attaching and enumerating the bhnd(4) child device, allowing us to safely allocate bus-level agent/device resources during bhnd(4) bus enumeration. - Add a bhnd_erom_probe() method usable by bhndb(4). This is an analogue to the existing bhnd_erom_probe_static() method, and allows the bhndb bridge to discover the best available erom parser class prior to newbus probing of its children. - Add support for supplying identification hints when probing erom devices. This is required on early EXTIF-only chipsets, where chip identification registers are not available. - Migrate bhndb over to the new bhnd_erom API, using bhnd_core_info records rather than bridged bhnd(4) device_t references to determine the bridged chipsets' capability/bridge configuration. - The bhndb parent (e.g. if_bwn) is now required to supply a hardware priority table to the bridge. The default table is currently sufficient for our supported devices. - Drop the two-pass attach approach we used for compatibility with bhndb(4) in the bhnd(4) bus drivers, and instead perform bus enumeration immediately, and allocate bridged per-child bus-level resources during that enumeration. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7768
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664a7497 |
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03-Sep-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
Implement a generic bhnd(4) device enumeration table API. This defines a new bhnd_erom_if API, providing a common interface to device enumeration on siba(4) and bcma(4) devices, for use both in the bhndb bridge and SoC early boot contexts, and migrates mips/broadcom over to the new API. This also replaces the previous adhoc device enumeration support implemented for mips/broadcom. Migration of bhndb to the new API will be implemented in a follow-up commit. - Defined new bhnd_erom_if interface for bhnd(4) device enumeration, along with bcma(4) and siba(4)-specific implementations. - Fixed a minor bug in bhndb that logged an error when we attempted to map the full siba(4) bus space (18000000-17FFFFFF) in the siba EROM parser. - Reverted use of the resource's start address as the ChipCommon enum_addr in bhnd_read_chipid(). When called from bhndb, this address is found within the host address space, resulting in an invalid bridged enum_addr. - Added support for falling back on standard bus_activate_resource() in bhnd_bus_generic_activate_resource(), enabling allocation of the bhnd_erom's bhnd_resource directly from a nexus-attached bhnd(4) device. - Removed BHND_BUS_GET_CORE_TABLE(); it has been replaced by the erom API. - Added support for statically initializing bhnd_erom instances, for use prior to malloc availability. The statically allocated buffer size is verified both at runtime, and via a compile-time assertion (see BHND_EROM_STATIC_BYTES). - bhnd_erom classes are registered within a module via a linker set, allowing mips/broadcom to probe available EROM parser instances without creating a strong reference to bcma/siba-specific symbols. - Migrated mips/broadcom to bhnd_erom_if, replacing the previous MIPS-specific device enumeration implementation. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7748
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203788ad |
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28-Aug-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Add a bhnd bus method for fetching the device's core table. This will allow us to perform bhndb(4) bridge configuration based on the identified hardware, prior to performing full enumeration of the child bhnd bus. Approved by: adrian (mentor, implicit)
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f90f4b65 |
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26-Aug-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Initial PMU/PWRCTL power and clock management support. - Added bhnd_pmu driver implementations for PMU and PWRCTL chipsets, derived from Broadcom's ISC-licensed HND code. - Added bhnd bus-level support for routing per-core clock and resource power requests to the PMU device. - Lift ChipCommon support out into the bhnd module, dropping bhnd_chipc. Reviewed by: mizhka Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7492
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688fc8c0 |
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24-Jun-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
bhnd(4): Add devinfo allocation and child addition methods, modeled on pci_if. This allows bhnd(4) to manage per-device state (such as per-core pmu/clock refcounting) on behalf of subclass driver instances. Approved by: re (gjb), adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6959
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31318f07 |
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22-Jun-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[BHND/bcma] Add implementation of BHND_BUS_RESET_CORE function for BCMA This patch addes missing implementation of BHND_BUS_RESET_CORE function for BCMA. The reset procedure is very simple: enable reset mode, stop clocking, enable clocking & force clock gating, disable reset mode, stop clock gating. Tested: * (michael) Tested on ASUS RT-N53 for enabling/reset USB core Submitted by: Michael Zhilin <mizhka@gmail.com> Approved by: re (gjb)
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7ba7852f |
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04-Jun-2016 |
Landon J. Fuller <landonf@FreeBSD.org> |
Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom Now that bhnd(4) provides feature parity with the previous siba/mips implementation, we can switch sentry5 over and begin lifting common support code out for use across bhnd(4) embedded targets. Changes: - Fixed enumeration of siba(4) per-core address maps, required for discovery of memory mapped chipc flash region on siba(4) devices. - Simplified bhnd kernel configuration (dropped 'bhndbus' option). - Replaced files.broadcom's direct file references with their corresponding standard kernel options. - Lifted out common bcma/siba nexus support, inheriting from the new generic bhnd_nexus driver. - Dropped now-unused sentry5 siba code. - Re-integrated BCM into the universe build now that it actually compiles. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D6712
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05992f9e |
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09-May-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[bhnd] fix bcma resource allocation for regions; EROM work around. * bcma.c - assign different resource IDs for different regions * bcma_erom.c - workaround for BCM/MIPS bus enumerations Tested: * (submitter) Tested on ASUS RT-N16 initially, double checked on ASUS RT-N53 * (landonf) BCM4331 Submitted by: Michael Zhilin <mizkha@gmail.com> Differential Revision: https://reviews.freebsd.org/D6245
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d9352570 |
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08-May-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[bhnd] Replace is_hostb_device() with a more general find_hostb_device() This allows bus children to query for the host bridge device, rather than having to iterate over all attached devices. Submitted by: Landon Fuller <landonf@landonf.org> Differential Revision: https://reviews.freebsd.org/D6193
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988fa8d0 |
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05-May-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
[bhnd] handle unknown port type. Reported by: emaste
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4ad7e9b0 |
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25-Feb-2016 |
Adrian Chadd <adrian@FreeBSD.org> |
Bring over the initial rewrite of the broadcom bus support found in their SoCs and various chips (including, famously, their wifi chips.) This is "just" (all 20,000 lines of it) code to enumerate the various versions of busses inside these devices, including the PCI bridge and the direct SIBA bridge found in MIPS chips. It also includes shared code for some bus operations (suspend, resume, etc); EEPROM/SROM/etc parsing and other things that are shared between chips. Eventually this'll replace the code that bwi/bwn uses for the internal bus, as well as some apparently upcoming mips74k broadcom SoC support which uses bwn! Thanks to Landon Fuller <landonf@landonf.org> for all this work! Obtained from: https://github.com/landonf/freebsd/compare/user/landonf/bcm4331-CURRENT
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