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95ee2897 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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65454883 |
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01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
arm: clean up empty lines in .c and .h files
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e9e2a7c1 |
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09-Apr-2018 |
Marcin Wojtas <mw@FreeBSD.org> |
Enable cesa driver to work with Linux DT binding Linux device tree binding, whose usage is obligatory, comprises faulty representation of Marvell cryptographic engine (CESA) - two engines are artificially gathered into single DT node, in order to avoid certain SW limitation. This patch improves the cesa driver to support above binding, depending on compatible string, which helps to ensure backward compatibility. Submitted by: Patryk Duda Obtained from: Semihalf Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D14760
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091cd2f1 |
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03-Apr-2018 |
Marcin Wojtas <mw@FreeBSD.org> |
Make mv_common.c generic for Marvell Armada38X and ArmadaXP Preparation for adding Armada38X and ArmadaXP SoC to GENERIC config. Supported platform are listed in soc_family enum. struct decode_win_spec contains platform specific functions and constants. Function mv_check_soc_family checks SoC type and chooses proper structure in runtime, as well as platform-dependent functions. Unnecessary dummy functions are removed. Because of changing registers name to more generic new definition of FDT_DEVMAP_MAX in mv_machdep is added. Submitted by: Rafal Kozik <rk@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D14738
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fefc2cf7 |
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03-Apr-2018 |
Marcin Wojtas <mw@FreeBSD.org> |
Make Marvell mv_pci.c driver generic PCI ports differ between Marvell SoCs, but have the same compatible in FDT. Identification is made based on parent compatible during attach. For ArmadaXP skipping enable procedure is necessary. To achieve it sc_skip_enable_procedure flag is used. For Armada38x find root procedure is necessary. For other SoCs root link is always at slot 0. sc_enable_find_root_slot flag is used to select proper behaviour. Marvell armv5 platforms does not support msi. Submitted by: Rafal Kozik <rk@semihalf.com> Reviewed by: andrew Obtained from: Semihalf Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D14735
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51369649 |
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20-Nov-2017 |
Pedro F. Giffuni <pfg@FreeBSD.org> |
sys: further adoption of SPDX licensing ID tags. Mainly focus on files that use BSD 3-Clause license. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point.
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a8d7fc4a |
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13-Jun-2017 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Introduce Armada 38x/XP network controller support This patch contains a new driver for the network unit of Marvell Armada 38x/XP SoCs, called NETA. This support was thoroughly tested and optimised in terms of stability and performance. Additional hardware features, like Buffer Management (BM) or Parser and Classifier (PnC) will be progressively supported as needed. Submitted by: Fabien Thomas <fabien.thomas@stormshield.eu> Arnaud Ysmal <arnaud.ysmal@stormshield.eu> Zbigniew Bodek <zbb@semihalf.com> Michal Mazur <mkm@semihalf.com> Bartosz Szczepanek <bsz@semihalf.com> Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield (main development) Netgate (cleanup and upstreaming) Differential revision: https://reviews.freebsd.org/D10706
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fcb93d74 |
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19-May-2017 |
Wojciech Macek <wma@FreeBSD.org> |
Enable proper configuration of CESA MBUS windows For all Marvell devices, MBUS windows configuration is done in a common place. Only CESA was an exception, so move its related code from driver to mv_common.c. This way it uses same proper DRAM information, same as all other interfaces instead of parsing DT /memory node directly. Submitted by: Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: loos Differential revision: https://reviews.freebsd.org/D10723
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abafc55b |
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17-May-2017 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Fix USB3.0 decoding windows on Armada38x Set correct offset for MBUS windows configuration in USB3.0 interface. Submitted by: Marcin Wojtas <mw@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: loos Differential revision: https://reviews.freebsd.org/D10721
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a5643648 |
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17-May-2017 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Move the IO Window Control Register defines out of the ARMADA38X ifdef. Fixes the build of Marvell kernels (other than ARMADA38X) after r318336. Reported by: mmel
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98a2d78d |
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15-May-2017 |
Luiz Otavio O Souza <loos@FreeBSD.org> |
Add the SDHCI Address Decoder registers and routines for ARMADA 38X. Tested on: ClearFog Pro Reviewed by: Marcin Wojtas <mw at semihalf.com> Sponsored by: Rubicon Communications, LLC (Netgate) Differential Revision: https://reviews.freebsd.org/D10601
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1eff4c0c |
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16-Mar-2017 |
Andrew Turner <andrew@FreeBSD.org> |
Remove code for Marvell SoCs that lack a kernel config. It seems to be old code from the armv6 project branch that never had a kernel config. Reviewed by: mmel Sponsored by: ABT Systems Lrd Differential Revision: https://reviews.freebsd.org/D7166
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ccd5b1b0 |
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25-Jan-2017 |
Wojciech Macek <wma@FreeBSD.org> |
Setup decoding windows for ARMADA38X It is necesarry to open memory windows on internal bus for AHCI driver to work correctly. Submitted by: Konrad Adamczyk <ka@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: zbb Differential revision: https://reviews.freebsd.org/D9220
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5d7cb9a8 |
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02-Jun-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Configure CPU window to second CESA SRAM Check if there is a second CESA SRAM node in FDT and add a CPU window for it. Define A38X specific macro for setting device attribute for each node. Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D6216
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34a3d2c6 |
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14-Mar-2016 |
Wojciech Macek <wma@FreeBSD.org> |
Add support for USB3.0 on Armada38x This commit provides attachment of xhci-platform for A38X boards, making it possible to mount FreeBSD world from USB3.0 flash. 'xhci' device was added to files.mv (as optional) and kernconf of Armada38x was enhanced. It was also necessary to open programmable memory windows of USB3.0. fdt_win_setup needed improvement so it's able to traverse through children of internal-regs node. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: hselasky Approved by: cognet (mentor) Differential Revision: https://reviews.freebsd.org/D5031
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46c9254b |
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20-Jan-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Open window to bootROM memory on Armada38x to allow CPU1 to boot CPU1 is halted in bootROM code while it is waiting to be released. Memory window to bootROM must be opened before booting the core. Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4425
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e34c3bf2 |
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20-Jan-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Correct MV_DDR_CADR_BASE definiton in mvwin.h SOC_MV_ARMADAXP ifdef was enhanced with SOC_MV_ARMADA38X, correcting MV_DDR_CADR_BASE definition. It fixes PCIe hangs issue. Reviewed by: andrew Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D4380
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5afccf36 |
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20-Jan-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Improve definitions of CPU/PCIe windows for Armada38x Enhance existing ARMADAXP defines and introduce new MV_WIN_PCIE_ definitions. Reviewed by: andrew Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Differential revision: https://reviews.freebsd.org/D4378
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5b683b6f |
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20-Jan-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Set IO Sync Barrier flags for all Mbus devices on Armada38x IO Sync Barrier setting is required for I/O coherency. Reviewed by: andrew, ian, imp Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4219
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f8742b0d |
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20-Jan-2016 |
Zbigniew Bodek <zbb@FreeBSD.org> |
Introduce initial support for Marvell Armada38x This commit introduces initial support for Marvell Armada38x platform. Changes: - Add common DTS files for Armada38x SoCs and DTS file for A388-GP - Add ARMADA38X kernel configuration - Add option SOC_MV_ARMADA38X and set MV_PCI_PORTS - Add list of files to compile - Implement get_tclk(), get_sar_value(), cpu_reset() functions - Add CPU ID and SoC numbers - Correct ifdefs in arm/mv/timer.c Reviewed by: ian, imp Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek <mst@semihalf.com> Differential revision: https://reviews.freebsd.org/D4210
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cfdb2eed |
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06-May-2013 |
Grzegorz Bernacki <gber@FreeBSD.org> |
Disable decoding windows with no FDT entry. - On ARMADAXP B0 (GP development board) we are not able to use PCI due to whole 32-bit address space used by 4GB of RAM memory. - Change is required to destroy unnecessary window to free address space for PCI and other devices - Fix offset value for SDRAM decoding windows Obtained from: Semihalf
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99eef682 |
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06-May-2013 |
Grzegorz Bernacki <gber@FreeBSD.org> |
Move initialization of CESA decoding windows from common section to driver specific files. - window initialization is done during device attach - CESA TDMA decoding windows values are set based on DTS, not copied from CPU registers - remove unnecessary virtual mapping - update dts file Obtained from: Semihalf
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e3ac9753 |
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14-Sep-2012 |
Grzegorz Bernacki <gber@FreeBSD.org> |
pci: Implement new memory and io space allocator for PCI. Cleanup code and move initializing bridge into separate function. Add checking of PCI mode (RC or endpoint). Obtained from: Semihalf
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d65cdf4b |
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14-Sep-2012 |
Grzegorz Bernacki <gber@FreeBSD.org> |
Add support for Armada XP A0. - Add functions to calculate clocks instead using hardcoded values - Update reset and timers functions - Update number of interrupts - Change name of platform from db88f78100 to db78460 - Correct DRAM size and PCI IRQ routing in dts file. Obtained from: Semihalf
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16694521 |
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14-Aug-2012 |
Oleksandr Tymoshenko <gonzo@FreeBSD.org> |
Merging of projects/armv6, part 7 Add Marvell ARMADA XP support Obtained from: Marvell, Semihalf
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c358d6a2 |
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12-Jun-2012 |
Warner Losh <imp@FreeBSD.org> |
Trim trailing whitespace...
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b91fab42 |
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18-May-2012 |
Grzegorz Bernacki <gber@FreeBSD.org> |
Add architecture dependent code to support NAND Framework on Marvell SoCs. Obtained from: Semihalf Supported by: FreeBSD Foundation, Juniper Networks
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a7d5f7eb |
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19-Oct-2010 |
Jamie Gritton <jamie@FreeBSD.org> |
A new jail(8) with a configuration file, to replace the work currently done by /etc/rc.d/jail.
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db5ef4fc |
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13-Jun-2010 |
Rafal Jaworowski <raj@FreeBSD.org> |
Convert Marvell ARM platforms to FDT convention. The following systems are involved: - DB-88F5182 - DB-88F5281 - DB-88F6281 - DB-78100 - SheevaPlug This overhaul covers the following major changes: - All integrated peripherals drivers for Marvell ARM SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values). - Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say good by to obio / mbus drivers and numerous hard-coded config data. Note that world needs to be built WITH_FDT for the affected platforms. Reviewed by: imp Sponsored by: The FreeBSD Foundation.
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ebeaf703 |
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25-Jun-2009 |
Rafal Jaworowski <raj@FreeBSD.org> |
Enable all populated TWSI (I2C) controllers on Marvell SOCs. Obtained from: Semihalf
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85fc5c3b |
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12-Jun-2009 |
Marcel Moolenaar <marcel@FreeBSD.org> |
Move the memory layout definitions and logic from mvreg.h to mvwin.h so that it isn't exposured unless needed. In particular this means that it's easier to tune the memory layout based on board details. While here, remove inclusion of <machine/intr.h> from mvreg.h. This also contains exposure to SoC specifics in MI drivers, because NIRQ depends on the SoC.
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