sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

make maximum interrupt number tunable on ARM, ARM64, MIPS, and RISC-V

Use a machdep.nirq tunable intead of compile-time constant NIRQ
as a value for maximum number of interrupts. It allows keep a system
footprint small by default with an option to increase the limit
for large systems like server-grade ARM64

Reviewd by: mhorne
Differential Revision: https://reviews.freebsd.org/D27844
Submitted by: Klara, Inc.
Sponsored by: Ampere Computing

Enable Marvell gpio driver to work with many controllers

This patch moves all global data structures into mv_gpio_softc,
and puts device_t parameter to functions calls everywhere where needed.
As a result, we can create multiple driver instances.

Removed names in function declaration to keep style.

Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14755

Introduce port debouncing mechanism in mv_gpio driver

This patch introduces gpio debouncing mechanism
with fixed memory allocation in critical section.

When you press button, value at gpio pin connected to button
is changing many times which will cause in unexpected behaviour.
Debouncing mechanism will prevent this phenomenon

Submitted by: Patryk Duda <pdk@semihalf.com>
Wojciech Macek <wma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14753

Make Marvell armv7 timer and wdt registers definitions common

Define timers registers for both SoCs and choose proper one during runtime
based on information from FDT.
In WDT driver there are different function for ArmadaXP and other ARMv5 SoCs.
In timer driver registers definitions are stored in resource_spec structure
and chosen during runtime.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14746

Make Marvell Armada reset registers usage generic

Define reset registers for both Armada38X and ArmadaXP and
choose proper one during runtime based on information from FDT.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14745

Make Marvell Armada watchdog driver more generic

Store platform dependent functions and constants in mv_wdt_config
structure and select proper configuration on runtime based on
compatible string provided in FDT.
Marvell Armada38X and ArmadaXP non-repetitive registers are moved to
generic part of code.
To support armv5 as well, use proper compatible string:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/watchdog/orion_wdt.c?h=v4.13-rc3#n456

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14740

Make mv_common.c generic for Marvell Armada38X and ArmadaXP

Preparation for adding Armada38X and ArmadaXP SoC to GENERIC config.
Supported platform are listed in soc_family enum.
struct decode_win_spec contains platform specific functions and constants.
Function mv_check_soc_family checks SoC type and chooses proper structure
in runtime, as well as platform-dependent functions.
Unnecessary dummy functions are removed.
Because of changing registers name to more generic new definition of
FDT_DEVMAP_MAX in mv_machdep is added.

Submitted by: Rafal Kozik <rk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14738

Split get_sar_value function for Marvell ArmadaXP and Armada38X

get_sar_value is implemented only for ArmadaXP and Armada38X. Splitting it for
two different functions and change registers names result in more generic code.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14736

Enable ArmadaXP using INTRNG interrupt controller

Defining INTRNG remove some necessary registers and declarations of
pic_init_secondary, pic_ipi_send, pic_ipi_read and pic_ipi_clear.
Because Marvell ArmadaXP and Armada38X always use INTRNG, include all
INTRNG code and remove code that does not use it.
Separate pic registers declarations for Armada38X are unnecessary, it
works properly with ArmadaXP config.

Submitted by: Rafal Kozik <rk@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Differential Revision: https://reviews.freebsd.org/D14734

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.

Enhance Armada 38x SoC identification string

Add hw_clockrate and CPU frequency, basing on sample-at-reset
configuration.

Submitted by: Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Marcin Wojtas <mw@semihalf.com>
Obtained from: Stormshield, Semihalf
Sponsored by: Stormshield
Reviewed by: andrew
Differential revision: https://reviews.freebsd.org/D10899

Enable SCU Speculative linefills to L2 on Armada 38x

Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10709

Optimize Armada38x low-level MBUS settings

Add early init handler, which comprises various internal
bus optimisations for Armada 38x SoC's. Magic values used
due to undocumented registers.

Submitted by: Marcin Wojtas <mw@semihalf.com>,
Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Obtained from: Semihalf, Stormshield
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10219

Remove code for Marvell SoCs that lack a kernel config.

It seems to be old code from the armv6 project branch that never had a
kernel config.

Reviewed by: mmel
Sponsored by: ABT Systems Lrd
Differential Revision: https://reviews.freebsd.org/D7166

Make MPIC compatible with ARM_INTRNG

After ARM_INTRNG introduction, MPIC code needed several modifications:
- IRQ resource and its handler added
- several DEVMETHODs of INTRNG interface implemented
- defines enhanced to ensure code compiles as well for AXP as for A38X
- added dummy MSI_IRQ, ERR_IRQ defines for Armada38x
- MPIC driver was added to files.armada38x, ARM_INTRNG option enabled in
kernconf file and regs of MPIC corrected in dts file.

Instead of modifying Armada38X DTS, offsets to CPU registers defined in
driver were changed. That required restoring 'reg' property of mpic node
in ArmadaXP to state compliant with Linux DTS.

Additionally, required ARM_INTRNG definitions were added to mv_common.c.

Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: adrian, andrew, ian, skra
Approved by: cognet (mentor)
Differential Revision: https://reviews.freebsd.org/D5030

Introduce initial driver for PMSU on Armada38x

This is a stub for PMSU driver. Note that it cannot be used to set the
secondary core boot address during attach because drivers are attached
later than SI_SUB_CPU sysinit where cores are started.
Setting the boot address should be done manually in platform_mp_start_ap().

SMP is working fine with this commit and was enabled in Armada38x kernel
configuration file.

Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Michal Stanek <mst@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4427

Add initial support for SMP on Armada38x

- Add file sys/arm/mv/armada38x/armada38x_mp.c
- Set mp_maxid and mp_ncpus based on FDT unless SCU register indicates
only one core
- Boot CPU1 in platform_mp_start_ap()
- IPI range defined

Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Michal Stanek <mst@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4426

Add support for watchdog on Armada38x

A38X watchdog support was implemented in sys/arm/mv/timer.c driver.
It required following modifications:
- add "marvell,armada-380-wdt" compatibility, which supports only watchdog
- correct and enhance definitions related to timer control register
- unmask reset capability in RSTOUTn_MASK register
- use dedicated watchdog timer on A38X instead of second timer

Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4423

Fix invalid root link detection in mv_pci driver

mv_pci driver omitted slot 0, which can be valid device on Armada38x.
New mechanism detects if device is root link, basing on vendor's
and device's IDs.
It is restricted to Armada38x; on other machines, behaviour remains
the same.

Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4377

Enable SCU unit for Armada38x

Valid SCU operation is necessary for SMP interoperability.
Initialization function armada38x_enable_scu() was added.

Reviewed by: andrew, ian
Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Bartosz Szczepanek <bsz@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4220

Introduce initial support for Marvell Armada38x

This commit introduces initial support for Marvell Armada38x platform.
Changes:
- Add common DTS files for Armada38x SoCs and DTS file for A388-GP
- Add ARMADA38X kernel configuration
- Add option SOC_MV_ARMADA38X and set MV_PCI_PORTS
- Add list of files to compile
- Implement get_tclk(), get_sar_value(), cpu_reset() functions
- Add CPU ID and SoC numbers
- Correct ifdefs in arm/mv/timer.c

Reviewed by: ian, imp
Obtained from: Semihalf
Sponsored by: Stormshield
Submitted by: Michal Stanek <mst@semihalf.com>
Differential revision: https://reviews.freebsd.org/D4210

Corrects the Kirkwood dreamplug to use
the right register for power managment. It
was incorrectly using the clock register
which also caused the status to be the
opposite of what it is supposed to be.
1 - its disabled
0 - its enabled

Per kirkwood spec FSS_88F6180_9x_6281_OpenSource.pdf

Fix the passing of time on Armada XP.

In order to become independent of Coherency Fabric frequency, configure
Timer and Watchdog to operate in 25MHz mode.

Submitted by: Zbigniew Bodek <zbb@semihalf.com>

Allow building LINT by defining both SAMPLE_AT_RESET on the one hand
and SAMPLE_AT_RESET_{LO|HI} on the other. It doesn't matter which
values they take, as long as they are defined.

Add support for Armada XP A0.

- Add functions to calculate clocks instead using hardcoded values
- Update reset and timers functions
- Update number of interrupts
- Change name of platform from db88f78100 to db78460
- Correct DRAM size and PCI IRQ routing in dts file.

Obtained from: Semihalf

Sort IDs.

Merging of projects/armv6, part 7

Add Marvell ARMADA XP support

Obtained from: Marvell, Semihalf

Add support for Marvell 88F6282.

Sponsored by: Plat'Home, Co.,Ltd.

Remove unused #defines. All this is now retrieved from the device tree.

MFC after: 1 week

A new jail(8) with a configuration file, to replace the work currently done
by /etc/rc.d/jail.

Convert Marvell ARM platforms to FDT convention.

The following systems are involved:

- DB-88F5182
- DB-88F5281
- DB-88F6281
- DB-78100
- SheevaPlug

This overhaul covers the following major changes:

- All integrated peripherals drivers for Marvell ARM SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).

- Since the common FDT infrastrucutre (fdtbus, simplebus) is used we say
good by to obio / mbus drivers and numerous hard-coded config data.

Note that world needs to be built WITH_FDT for the affected platforms.

Reviewed by: imp
Sponsored by: The FreeBSD Foundation.

MFC r196531-196534,196536

Clean up Marvell platform code.

Introduce SheevaPlug support.

- The device is based on Marvell 88F6281 system on chip.
- More info about the platform at http://www.plugcomputer.org

- To build the FreeBSD kernel:
make buildkernel TARGET_ARCH=arm KERNCONF=SHEEVAPLUG

- Installation notes at: http://wiki.freebsd.org/FreeBSDMarvell

Submitted by: Michal Hajduk
Approved by: re (kib)
Obtained from: Semihalf

Properly handle initial state of power mgmt.

Modules on Marvell SOC can be selectively PM-disabled, and we must not access
disabled devices' registers (attempt to initialize them) unconditionally, as
this leads to the system hang. This patch introduces graceful handling of the
PM state during devices init.

Submitted by: Michal Hajduk
Obtained from: Semihalf

Introduce ata(4) support for Marvell integrated SATA controllers (found on
88F5xxx, 88F6xxx and MV78xxx system on chip devices).

Reviewed by: stas
Obtained from: Semihalf

Move the memory layout definitions and logic from mvreg.h to mvwin.h
so that it isn't exposured unless needed. In particular this means
that it's easier to tune the memory layout based on board details.
While here, remove inclusion of <machine/intr.h> from mvreg.h. This
also contains exposure to SoC specifics in MI drivers, because NIRQ
depends on the SoC.

Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,
handle Z0 revision (early silicon) explicitly due to its quirks.

Obtained from: Marvell, Semihalf

Improve and extend Marvell SOCs platform code.

- Allow for setting per platform MPP/GPIO configuration in the kernel, so
that we can override all settings firmware might set.

- Set decode windows for the remaining on-chip peripherals: CESA, SATA and XOR.

- Improve handling of USB controllers so that all port are available on the
given SOC/platform (e.g. up to three on DB-78xxx), this includes rework of
USB decode windows set-up.

- Other minor fixes and cosmetics.

Obtained from: Semihalf

Adjust Marvell SOC support for A0 chip revision.

- Clean up TCLK handling so that it's dynamically recognized depending on
registers settings or chip version/revision. Update registers definitions.

- Teach SOC ident routine about A0 (initial silicon version for general
audience)

Obtained from: Marvell, Semihalf

PCI/PCI-Express support for Marvell systems.

Obtained from: Marvell, Semihalf

- Import the HEAD csup code which is the basis for the cvsmode work.

Introduce basic support for Marvell families of system-on-chip ARM devices:

* Orion
- 88F5181
- 88F5182
- 88F5281

* Kirkwood
- 88F6281

* Discovery
- MV78100

The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:

* GPIO
* Interrupt controller
* L1, L2 cache
* Timers, watchdog, RTC
* TWSI (I2C)
* UART

Other peripherals drivers will be introduced separately.

Reviewed by: imp, marcel, stass (Thanks guys!)
Obtained from: Marvell, Semihalf