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29363fb4 |
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23-Nov-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove ancient SCCS tags. Remove ancient SCCS tags from the tree, automated scripting, with two minor fixup to keep things compiling. All the common forms in the tree were removed with a perl script. Sponsored by: Netflix
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2ff63af9 |
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16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: one-line .h pattern Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/
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9051987e |
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30-Sep-2022 |
Ed Maste <emaste@FreeBSD.org> |
amd64: Bump MAXCPU to 1024 (from 256) Hardware with more than 256 CPU cores is currently available and will become increasingly common over FreeBSD 14's lifetime. Increase MAXCPU in the amd64 GENERIC kernel configuration to 1024. Earlier commits increased some related limits. These prerequisite commits include at least: - d7ed40243769 Increase MAX_APIC_ID safeguard to 0x800 - d1639e43c589 cpuset: increase userland maximum size to 1024 Global and allocated arrays sized by MAXCPU result in excessive bloat on systems with lower core counts. In addition, some code used u_char (8 bits) to hold a CPU index, which is not valid if MAXCPU is greater than 256. A number of recent commits addressed these sorts of issues, including at least: - 133935d26f20 pf: atomically increment state ids - 74ac712f72cf vmm: Dynamically allocate a couple of per-CPU state save areas - 78cfa762ebf2 callout: Move per-CPU callout state into the dpcpu region - 42f722e721cd amd64: store pcids pmap data in pcpu zone - 9801e7c275f6 smp_topo: dynamically allocate group array - 9fb6718d1b18 smp: Dynamically allocate the stoppcbs array - 2bb16c635249 x86: retire use of intr_bind There are some additional allocations still to be converted and more scalability work is required to make effective use of very high core count systems, but this change allows us to boot on these systems and provides a Kernel Binary Interface (KBI) for the FreeBSD 14 release that supports these configurations. Special thanks to AMD for providing hardware to test these changes. PR: 269572 Reviewed by: des Relnotes: Yes Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D36838
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89786088 |
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10-Aug-2021 |
Mark Johnston <markj@FreeBSD.org> |
amd64: Populate the KMSAN shadow maps and integrate with the VM - During boot, allocate PDP pages for the shadow maps. The region above KERNBASE is currently not shadowed. - Create a dummy shadow for the vm page array. For now, this array is not protected by the shadow map to help reduce kernel memory usage. - Grow shadows when growing the kernel map. - Increase the default kernel stack size when KMSAN is enabled. As with KASAN, sanitizer instrumentation appears to create stack frames large enough that the default value is not sufficient. - Disable UMA's use of the direct map when KMSAN is configured. KMSAN cannot validate the direct map. - Disable unmapped I/O when KMSAN configured. - Lower the limit on paging buffers when KMSAN is configured. Each buffer has a static MAXPHYS-sized allocation of KVA, which in turn eats 2*MAXPHYS of space in the shadow map. Reviewed by: alc, kib Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D31295
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f115c061 |
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13-Apr-2021 |
Mark Johnston <markj@FreeBSD.org> |
amd64: Add MD bits for KASAN - Initialize KASAN before executing SYSINITs. - Add a GENERIC-KASAN kernel config, akin to GENERIC-KCSAN. - Increase the kernel stack size if KASAN is enabled. Some of the ASAN instrumentation increases stack usage and it's enough to trigger stack overflows in ZFS. - Mark the trapframe as valid in interrupt handlers if it is assigned to td_intr_frame. Otherwise, an interrupt in a function which creates a poisoned alloca region can trigger false positives. MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D29455
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543769bf |
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01-Sep-2020 |
Mateusz Guzik <mjg@FreeBSD.org> |
amd64: clean up empty lines in .c and .h files
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#
9ce875d9 |
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23-Aug-2020 |
Konstantin Belousov <kib@FreeBSD.org> |
amd64 pmap: LA57 AKA 5-level paging Since LA57 was moved to the main SDM document with revision 072, it seems that we should have a support for it, and silicons are coming. This patch makes pmap support both LA48 and LA57 hardware. The selection of page table level is done at startup, kernel always receives control from loader with 4-level paging. It is not clear how UEFI spec would adapt LA57, for instance it could hand out control in LA57 mode sometimes. To switch from LA48 to LA57 requires turning off long mode, requesting LA57 in CR4, then re-entering long mode. This is somewhat delicate and done in pmap_bootstrap_la57(). AP startup in LA57 mode is much easier, we only need to toggle a bit in CR4 and load right value in CR3. I decided to not change kernel map for now. Single PML5 entry is created that points to the existing kernel_pml4 (KML4Phys) page, and a pml5 entry to create our recursive mapping for vtopte()/vtopde(). This decision is motivated by the fact that we cannot overcommit for KVA, so large space there is unusable until machines start providing wider physical memory addressing. Another reason is that I do not want to break our fragile autotuning, so the KVA expansion is not included into this first step. Nice side effect is that minidumps are compatible. On the other hand, (very) large address space is definitely immediately useful for some userspace applications. For userspace, numbering of pte entries (or page table pages) is always done for 5-level structures even if we operate in 4-level mode. The pmap_is_la57() function is added to report the mode of the specified pmap, this is done not to allow simultaneous 4-/5-levels (which is not allowed by hw), but to accomodate for EPT which has separate level control and in principle might not allow 5-leve EPT despite x86 paging supports it. Anyway, it does not seems critical to have 5-level EPT support now. Tested by: pho (LA48 hardware) Reviewed by: alc Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D25273
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#
c3d326fd |
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05-Feb-2020 |
Mark Johnston <markj@FreeBSD.org> |
Define MAXCPU consistently between the kernel and KLDs. This reverts r177661. The change is no longer very useful since out-of-tree KLDs will be built to target SMP kernels anyway. Moveover it breaks the KBI in !SMP builds since cpuset_t's layout depends on the value of MAXCPU, and several kernel interfaces, notably smp_rendezvous_cpus(), take a cpuset_t as a parameter. PR: 243711 Reviewed by: jhb, kib Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D23512
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df57947f |
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18-Nov-2017 |
Pedro F. Giffuni <pfg@FreeBSD.org> |
spdx: initial adoption of licensing ID tags. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point. Initially, only tag files that use BSD 4-Clause "Original" license. RelNotes: yes Differential Revision: https://reviews.freebsd.org/D13133
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#
9e689897 |
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22-Oct-2017 |
Mateusz Guzik <mjg@FreeBSD.org> |
Make the sleepq chain hash size configurable per-arch and bump on amd64. While here cache-align chains. This shortens longest found chain during poudriere -j 80 from 32 to 16. Pushing this higher up will probably require allocation on boot.
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#
2744a0b6 |
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28-Aug-2017 |
Conrad Meyer <cem@FreeBSD.org> |
Drop CACHE_LINE_SIZE to 64 bytes on x86 The actual cache line size has always been 64 bytes. The 128 number arose as an optimization for Core 2 era Intel processors. By default (configurable in BIOS), these CPUs would prefetch adjacent cache lines unintelligently. Newer CPUs prefetch more intelligently. The latest Core 2 era CPU was introduced in September 2008 (Xeon 7400 series, "Dunnington"). If you are still using one of these CPUs, especially in a multi-socket configuration, consider locating the "adjacent cache line prefetch" option in BIOS and disabling it. Reported by: mjg Reviewed by: np Discussed with: jhb Sponsored by: Dell EMC Isilon
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7ecf8cab |
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12-Apr-2016 |
John Baldwin <jhb@FreeBSD.org> |
Enable DEVICE_NUMA with up to 8 domains by default on amd64. 8 memory domains should handle a quad-socket board with dual-domain processors. Reviewed by: kib Relnotes: maybe? Differential Revision: https://reviews.freebsd.org/D5893
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#
6fdfd882 |
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02-Jul-2015 |
Konstantin Belousov <kib@FreeBSD.org> |
Use single instance of the identical INKERNEL() and PMC_IN_KERNEL() macros on amd64 and i386. Move the definition to machine/param.h. kgdb defines INKERNEL() too, the conflict is resolved by renaming kgdb version to PINKERNEL(). On i386, correct the lowest kernel address. After the shared page was introduced, USRSTACK no longer points to the last user address + 1 [*] Submitted by: Oliver Pinter [*] Sponsored by: The FreeBSD Foundation MFC after: 1 week
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64d6de26 |
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20-Aug-2014 |
John Baldwin <jhb@FreeBSD.org> |
Bump MAXCPU on amd64 from 64 to 256. In practice APIC only permits 255 CPUs (IDs 0 through 254). Getting above that limit requires x2APIC. MFC after: 1 month
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#
f3db4c53 |
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14-May-2014 |
Neel Natu <neel@FreeBSD.org> |
Increase the TSS limit by one byte. The processor requires an additional byte with all bits set to 1 beyond the I/O permission bitmap. Prior to this change accessing I/O ports [0xFFF8-0xFFFF] would trigger a #GP fault even though the I/O bitmap allowed access to those ports. For more details see section "I/O Permission Bit Map" in the Intel SDM, Vol 1. Reviewed by: kib
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#
941646f5 |
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07-May-2013 |
Attilio Rao <attilio@FreeBSD.org> |
Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h in order to match the MAXCPU concept. The change should also be useful for consolidation and consistency. Sponsored by: EMC / Isilon storage division Obtained from: jeff Reviewed by: alc
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#
e2082935 |
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14-Aug-2012 |
Dag-Erling Smørgrav <des@FreeBSD.org> |
As discussed on -current, remove the hardcoded default maxswzone. MFC after: 3 weeks
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#
786ef92b |
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19-Jul-2011 |
Attilio Rao <attilio@FreeBSD.org> |
Bump MAXCPU for amd64, ia64 and XLP mips appropriately. From now on, default values for FreeBSD will be 64 maxiumum supported CPUs on amd64 and ia64 and 128 for XLP. All the other architectures seem already capped appropriately (with the exception of sparc64 which needs further support on jalapeno flavour). Bump __FreeBSD_version in order to reflect KBI/KPI brekage introduced during the infrastructure cleanup for supporting MAXCPU > 32. This covers cpumask_t retiral too. The switch is considered completed at the present time, so for whatever bug you may experience that is reconducible to that area, please report immediately. Requested by: marcel, jchandra Tested by: pluknet, sbruno Approved by: re (kib)
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68b739cd |
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18-Jul-2011 |
Attilio Rao <attilio@FreeBSD.org> |
Add the possibility to specify from kernel configs MAXCPU value. This patch is going to help in cases like mips flavours where you want a more granular support on MAXCPU. No MFC is previewed for this patch. Tested by: pluknet Approved by: re (kib)
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#
74e4245e |
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07-Jun-2011 |
Attilio Rao <attilio@FreeBSD.org> |
Bring back the number of CPU to 32.
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#
71a19bdc |
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05-May-2011 |
Attilio Rao <attilio@FreeBSD.org> |
Commit the support for removing cpumask_t and replacing it directly with cpuset_t objects. That is going to offer the underlying support for a simple bump of MAXCPU and then support for number of cpus > 32 (as it is today). Right now, cpumask_t is an int, 32 bits on all our supported architecture. cpumask_t on the other side is implemented as an array of longs, and easilly extendible by definition. The architectures touched by this commit are the following: - amd64 - i386 - pc98 - arm - ia64 - XEN while the others are still missing. Userland is believed to be fully converted with the changes contained here. Some technical notes: - This commit may be considered an ABI nop for all the architectures different from amd64 and ia64 (and sparc64 in the future) - per-cpu members, which are now converted to cpuset_t, needs to be accessed avoiding migration, because the size of cpuset_t should be considered unknown - size of cpuset_t objects is different from kernel and userland (this is primirally done in order to leave some more space in userland to cope with KBI extensions). If you need to access kernel cpuset_t from the userland please refer to example in this patch on how to do that correctly (kgdb may be a good source, for example). - Support for other architectures is going to be added soon - Only MAXCPU for amd64 is bumped now The patch has been tested by sbruno and Nicholas Esborn on opteron 4 x 12 pack CPUs. More testing on big SMP is expected to came soon. pluknet tested the patch with his 8-ways on both amd64 and i386. Tested by: pluknet, sbruno, gianni, Nicholas Esborn Reviewed by: jeff, jhb, sbruno
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#
a7d5f7eb |
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19-Oct-2010 |
Jamie Gritton <jamie@FreeBSD.org> |
A new jail(8) with a configuration file, to replace the work currently done by /etc/rc.d/jail.
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#
87d45a03 |
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22-Jul-2010 |
Konstantin Belousov <kib@FreeBSD.org> |
When compat32 binary asks for the value of hw.machine_arch, report the name of 32bit sibling architecture instead of the host one. Do the same for hw.machine on amd64. Add a safety belt debug.adaptive_machine_arch sysctl, to turn the substitution off. Reviewed by: jhb, nwhitehorn MFC after: 2 weeks
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#
8c0099ae |
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16-Nov-2009 |
Poul-Henning Kamp <phk@FreeBSD.org> |
Uppercase the UL suffix on a constant, so Flexelint doesn't worry that 'u1' might have been intended. No, that does not make sense and yes I have told them.
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#
ebc91405 |
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31-Oct-2009 |
Alan Cox <alc@FreeBSD.org> |
MFC r197316 Add a new sysctl for reporting all of the supported page sizes.
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fe105d45 |
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18-Sep-2009 |
Alan Cox <alc@FreeBSD.org> |
Add a new sysctl for reporting all of the supported page sizes. Reviewed by: jhb MFC after: 3 weeks
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#
a254d1f1 |
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08-Sep-2009 |
Poul-Henning Kamp <phk@FreeBSD.org> |
Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating an architecture specific include file containing the _ALIGN* stuff which <sys/socket.h> needs.
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a330ed7c |
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07-Sep-2009 |
Poul-Henning Kamp <phk@FreeBSD.org> |
Move multi-include protection back up to the top of the file and name after the physical file rather than the aliased name.
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8c393fd1 |
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05-Jul-2009 |
Sam Leffler <sam@FreeBSD.org> |
Cleanup ALIGNED_POINTER: o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v) o define as "1" on amd64 and i386 where there is no restriction o make the type returned consistent with ALIGN o remove _ALIGNED_POINTER o make associated comments consistent Reviewed by: bde, imp, marcel Approved by: re (kensmith)
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3cfc28b0 |
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08-Jun-2009 |
Alan Cox <alc@FreeBSD.org> |
Now that amd64's kernel map is 512GB (SVN rev 192216), there is no reason to cap its buffer map at 1GB. MFC after: 6 weeks
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#
8aba835b |
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18-May-2009 |
John Baldwin <jhb@FreeBSD.org> |
Bump CACHE_LINE_SIZE to 128 for x86. Intel's manuals explicitly recommend using 128 byte alignment for locks. (See IA-32 SDM Vol 3A 7.11.6.7)
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9725389e |
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19-Apr-2009 |
Robert Watson <rwatson@FreeBSD.org> |
Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizing a fair number of static data structures, making this an unlikely option to try to change without also changing source code. [1] Change default cache line size on ia64, sparc64, and sun4v to 128 bytes, as this was what rtld-elf was already using on those platforms. [2] Suggested by: bde [1], jhb [2] MFC after: 2 weeks
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22037b2d |
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19-Apr-2009 |
Robert Watson <rwatson@FreeBSD.org> |
Add description and cautionary note regarding CACHE_LINE_SIZE. MFC after: 2 weeks Suggested by: alc
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a93fa8f2 |
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19-Apr-2009 |
Robert Watson <rwatson@FreeBSD.org> |
For each architecture, define CACHE_LINE_SHIFT and a derived CACHE_LINE_SIZE constant. These constants are intended to over-estimate the cache line size, and be used at compile-time when a run-time tuning alternative isn't appropriate or available. Defaults for all architectures are 64 bytes, except powerpc where it is 128 bytes (used on G5 systems). MFC after: 2 weeks Discussed on: arch@
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d7f03759 |
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19-Oct-2008 |
Ulf Lilleengen <lulf@FreeBSD.org> |
- Import the HEAD csup code which is the basis for the cvsmode work.
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#
3d074cf3 |
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01-Oct-2008 |
John Baldwin <jhb@FreeBSD.org> |
Bump MAXCPU to 32 now that 32 CPU x86 systems exist. Tested by: rwatson, mdtansca Approved by: peter
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#
67cbc115 |
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31-Jul-2008 |
Alan Cox <alc@FreeBSD.org> |
Enhance pmap_change_attr() with the ability to demote 1GB page mappings.
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#
9a8f0437 |
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19-Jul-2008 |
Alan Cox <alc@FreeBSD.org> |
Increase the ceiling on the size of the buffer map.
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e4839437 |
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26-Mar-2008 |
John Birrell <jb@FreeBSD.org> |
When building a kernel module, define MAXCPU the same as SMP so that modules work with and without SMP.
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d5e61c97 |
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08-Jan-2006 |
Warner Losh <imp@FreeBSD.org> |
By popular demand, move __HAVE_ACPI and __PCI_REROUTE_INTERRUPT into param.h. Per request, I've placed these just after the _NO_NAMESPACE_POLLUTION ifndef. I've not renamed anything yet, but may since we don't need the __. Submitted by: bde, jhb, scottl, many others.
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#
224d1402 |
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06-Dec-2005 |
Ruslan Ermilov <ru@FreeBSD.org> |
Drop _MACHINE_ARCH and _MACHINE defines (not to be confused with MACHINE_ARCH and MACHINE). Their purpose was to be able to test in cpp(1), but cpp(1) only understands integer type expressions. Using such unsupported expressions introduced a number of subtle bugs, which were discovered by compiling with -Wundef.
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#
014693eb |
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29-Jun-2005 |
John Baldwin <jhb@FreeBSD.org> |
Increase MAXCPU to 16 in SMP kernels so that APIC IDs from 0 to 15 are allowed for CPUs. Tested by: amd64 at cybernetwork dot org Approved by: re (scottl) MFC after: 1 week
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ba2426ff |
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20-Jan-2005 |
Peter Wemm <peter@FreeBSD.org> |
MFi386: whitespace, copyright header, etc updates
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46280ae7 |
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05-Jan-2005 |
Warner Losh <imp@FreeBSD.org> |
Begin all license/copyright comments with /*-
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ab44ebf5 |
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19-Nov-2004 |
David Schultz <das@FreeBSD.org> |
Remove UAREA_PAGES. Reviewed by: arch@
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9923b511 |
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02-Sep-2004 |
Scott Long <scottl@FreeBSD.org> |
Turn PREEMPTION into a kernel option. Make sure that it's defined if FULL_PREEMPTION is defined. Add a runtime warning to ULE if PREEMPTION is enabled (code inspired by the PREEMPTION warning in kern_switch.c). This is a possible MT5 candidate.
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9352fe30 |
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01-Aug-2004 |
Scott Long <scottl@FreeBSD.org> |
Turn off PREEMPTION by default while it gets debugged. It's been causing 4 weeks of problems including deadlocks and instant panics. Note that the real bugs are likely in the scheduler.
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#
0c0b25ae |
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02-Jul-2004 |
John Baldwin <jhb@FreeBSD.org> |
Implement preemption of kernel threads natively in the scheduler rather than as one-off hacks in various other parts of the kernel: - Add a function maybe_preempt() that is called from sched_add() to determine if a thread about to be added to a run queue should be preempted to directly. If it is not safe to preempt or if the new thread does not have a high enough priority, then the function returns false and sched_add() adds the thread to the run queue. If the thread should be preempted to but the current thread is in a nested critical section, then the flag TDF_OWEPREEMPT is set and the thread is added to the run queue. Otherwise, mi_switch() is called immediately and the thread is never added to the run queue since it is switch to directly. When exiting an outermost critical section, if TDF_OWEPREEMPT is set, then clear it and call mi_switch() to perform the deferred preemption. - Remove explicit preemption from ithread_schedule() as calling setrunqueue() now does all the correct work. This also removes the do_switch argument from ithread_schedule(). - Do not use the manual preemption code in mtx_unlock if the architecture supports native preemption. - Don't call mi_switch() in a loop during shutdown to give ithreads a chance to run if the architecture supports native preemption since the ithreads will just preempt DELAY(). - Don't call mi_switch() from the page zeroing idle thread for architectures that support native preemption as it is unnecessary. - Native preemption is enabled on the same archs that supported ithread preemption, namely alpha, i386, and amd64. This change should largely be a NOP for the default case as committed except that we will do fewer context switches in a few cases and will avoid the run queues completely when preempting. Approved by: scottl (with his re@ hat)
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#
b8168ede |
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07-Jun-2004 |
Peter Wemm <peter@FreeBSD.org> |
Be a little more consistent in the naming of the PML4 defines.
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#
35833d6a |
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20-Dec-2003 |
Alan Cox <alc@FreeBSD.org> |
Since we have additional kernel virtual address space, allow the buffer cache to grow to 400M bytes.
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#
0d2a2989 |
|
17-Nov-2003 |
Peter Wemm <peter@FreeBSD.org> |
Initial landing of SMP support for FreeBSD/amd64. - This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
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#
3950c407 |
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30-Jul-2003 |
Peter Wemm <peter@FreeBSD.org> |
KSTACK_PAGES is a global option.
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#
49a2507b |
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14-Jun-2003 |
Alan Cox <alc@FreeBSD.org> |
Migrate the thread stack management functions from the machine-dependent to the machine-independent parts of the VM. At the same time, this introduces vm object locking for the non-i386 platforms. Two details: 1. KSTACK_GUARD has been removed in favor of KSTACK_GUARD_PAGES. The different machine-dependent implementations used various combinations of KSTACK_GUARD and KSTACK_GUARD_PAGES. To disable guard page, set KSTACK_GUARD_PAGES to 0. 2. Remove the (unnecessary) clearing of PG_ZERO in vm_thread_new. In 5.x, (but not 4.x,) PG_ZERO can only be set if VM_ALLOC_ZERO is passed to vm_page_alloc() or vm_page_grab().
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#
7fc03ef4 |
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03-Jun-2003 |
Peter Wemm <peter@FreeBSD.org> |
Fix ALIGNED_POINTER(). sizeof((u_int32_t)) is not legal C.
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#
3c9a3c9c |
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22-May-2003 |
Peter Wemm <peter@FreeBSD.org> |
Major pmap rework to take advantage of the larger address space on amd64 systems. Of note: - Implement a direct mapped region using 2MB pages. This eliminates the need for temporary mappings when getting ptes. This supports up to 512GB of physical memory for now. This should be enough for a while. - Implement a 4-tier page table system. Most of the infrastructure is there for 128TB of userland virtual address space, but only 512GB is presently enabled due to a mystery bug somewhere. The design of this was heavily inspired by the alpha pmap.c. - The kernel is moved into the negative address space(!). - The kernel has 2GB of KVM available. - Provide a uma memory allocator to use the direct map region to take advantage of the 2MB TLBs. - Fixed some assumptions in the bus_space macros about the ability to fit virtual addresses in an 'int'. Notable missing things: - pmap_growkernel() should be able to grow to 512GB of KVM by expanding downwards below kernbase. The kernel must be at the top 2GB of the negative address space because of gcc code generation strategies. - need to fix the >512GB user vm code. Approved by: re (blanket)
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#
afa88623 |
|
30-Apr-2003 |
Peter Wemm <peter@FreeBSD.org> |
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
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#
1e57e9eb |
|
30-Apr-2003 |
Peter Wemm <peter@FreeBSD.org> |
Repocopy from x86_64/... to amd64/... Rename visible x86_64 references to amd64. Kill MID_MACHINE, its a.out specific, the only platform that supports it is i386. All of the other platforms should remove it too.
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#
66422f5b |
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16-Sep-2002 |
Peter Wemm <peter@FreeBSD.org> |
Initiate deorbit burn for the i386-only a.out related support. Moves are under way to move the remnants of the a.out toolchain to ports. As the comment in src/Makefile said, this stuff is deprecated and one should not expect this to remain beyond 4.0-REL. It has already lasted WAY beyond that. Notable exceptions: gcc - I have not touched the a.out generation stuff there. ldd/ldconfig - still have some code to interface with a.out rtld. old as/ld/etc - I have not removed these yet, pending their move to ports. some includes - necessary for ldd/ldconfig for now. Tested on: i386 (extensively), alpha
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176d0ec1 |
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30-Jun-2002 |
David E. O'Brien <obrien@FreeBSD.org> |
This is the start of the FreeBSD/x86_64 kernel.
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