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252495 |
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02-Jul-2013 |
np |
MFC all cxgbe(4) changes missing from stable/9: r248925, r249368, r249370, r249376, r249382, r249383, r249385, r249391, r249392, r249393, r249627, r249629, r250090, r250092, r250093, r250117, r250218, r250221, r250614, r251213, r251317, r251358, r251434, r251518, r251638, r252312, r252469, r252470, r250697(kib).
r248925: Support for Chelsio's 40G Terminator 5 (aka T5) ASIC. ...
r249368: Set and display the IP fragment bit correctly when dealing with the filter mode.
r249370: cxgbe(4): Ensure that the MOD_LOAD handler runs before either t4nex or t5nex attach to their devices.
r249376: - Explain clearly why a different firmware is being installed (if/when it is being installed). Improve other error messages while here.
- Select special FPGA specific configuration profile when appropriate.
r249382: There is no need for elaborate queries and error checking when trying to set FW4MSG_ENCAP.
r249383: Get rid of a couple of stray \n's.
r249385: cxgbe/tom: Slight simplification of code that calculates options2.
r249391: Auto-reduce the holdoff timers that are greater than the maximum value allowed by the hardware.
r249392: Cosmetic change (s/wrwc/wcwr/;s/WRWC/WCWR/).
r249393: Add pciids of the T5 based cards. The ones that I haven't tested with cxgbe(4) are disabled for now. This will change.
r249627: cxgbe/tom: Update the CLIP table on the chip when there are changes to the list of IPv6 addresses on the system. The table is used for TOE+IPv6 only.
r249629: cxgbe(4): Refuse to install T5 firmwares on a T4 card (and vice versa).
r250090: cxgbe(4): Some updates to shared code.
r250092: - Provide accurate ifmedia information so that 40G ports/transceivers are displayed properly in ifconfig, etc.
- Use the same number of tx and rx queues for a 40G port as for a 10G port.
r250093: Attach to the T580 (2 x 40G) card.
r250117: Fix DDP breakage introduced in r248925. Bitwise OR has higher precedence than ternary conditional.
r250218: cxgbe/tom: Do not use M_PROTO1 to mark rx zero-copy mbufs as special. All the M_PROTOn flags are clobbered when an mbuf is appended to the socket buffer.
r250221: cxgbe: Switch to a better way to install firmware.
r250614: Deal correctly with 40G ports that don't have any transceiver plugged in. Do not claim that they have unknown tranceivers.
r251213: cxgbe(4): Some more debug sysctls. These work on both T4 and T5 based cards.
r251317: cxgbe(4): t4fw_cfg must be explicitly loaded if the driver is being loaded via loader.conf.
r251358: cxgbe(4): Provide accurate hit count for filters on T5 cards. The location within the TCB and the size have both changed.
r251434: cxgbe(4): Never install a firmware if hw.cxgbe.fw_install is 0.
r251518: cxgbe/tom: Fix bad signed/unsigned mixup in the stid allocator. This fixes a panic when allocating a mixture of IPv6 and IPv4 stids.
r251638: cxgbe/tom: Allow caller to select the queue (control or data) used to send the CPL_SET_TCB_FIELD request in t4_set_tcb_field().
r252312: Update T5 register ranges. This is so that regdump skips over registers with read side-effects.
r252469: Add a sysctl to get the number of filters available.
sysctl dev.t4nex.<N>.nfilters sysctl dev.t5nex.<N>.nfilters
r252470: Count the number of hits for a filter by default.
r250697: Add dependencies on the firmware, which allows the loading of the cxgb and cxgbe modules.
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#
242015 |
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24-Oct-2012 |
gavin |
Merge r240680 from head:
Align the PCI Express #defines with the style used for the PCI-X #defines. This has the advantage that it makes the names more compact, and also allows us to correct the non-uniform naming of the PCIM_LINK_* defines, making them all consistent amongst themselves.
This is a mostly mechanical rename: s/PCIR_EXPRESS_/PCIER_/g s/PCIM_EXP_/PCIEM_/g s/PCIM_LINK_/PCIEM_LINK_/g
In this MFC, #defines have been added for the old names to assist out-of-tree drivers.
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#
237925 |
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01-Jul-2012 |
np |
MFC r237832, r237436, r237439, r237463, r237512, r237587, r237799, r237819, r237831.
r237832: cxgb(4): IPv6 rx/tx hw checksum, IPv6 TSO and LRO too.
r237436: cxgbe(4): update to firmware interface 1.5.2.0; updates to shared code.
r237439: Do not read registers with read side effects while performing a register dump for cxgbetool.
r237463: Do not allocate extra vectors when adapter is not TOE capable (or toecaps have been disallowed by the user).
r237512: Better way to determine the status page length and rx pad boundary.
r237587: Allow cxgbe(4) running within a VM to attach to its devices that have been exported via PCI passthrough.
r237799: cxgbe(4): support for IPv6 hardware checksumming (rx and tx).
r237819: cxgbe(4): support for IPv6 TSO and LRO.
r237831: - Assign (don't OR) the CSUM_XXX bits to csum_flags in the rx checksum code. - Fix TSO/TSO4 mixup. - Add IFCAP_LINKSTATE to the available/enabled capabilities.
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#
222509 |
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30-May-2011 |
np |
L2 table code. This is enough to get the T4's switch + L2 rewrite filters working. (All other filters - switch without L2 info rewrite, steer, and drop - were already fully-functional).
Some contrived examples of "switch" filters with L2 rewriting:
# cxgbetool t4nex0 iport 0 dport 80 action switch vlan +9 eport 3 Intercept all packets received on physical port 0 with TCP port 80 as destination, insert a vlan tag with VID 9, and send them out of port 3.
# cxgbetool t4nex0 sip 192.168.1.1/32 ivlan 5 action switch \ vlan =9 smac aa:bb:cc:dd:ee:ff eport 0 Intercept all packets (received on any port) with source IP address 192.168.1.1 and VLAN id 5, rewrite the VLAN id to 9, rewrite source mac to aa:bb:cc:dd:ee:ff, and send it out of port 0.
MFC after: 1 week
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