Copy stable/9 to releng/9.3 as part of the 9.3-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r242625:

Remove duplicate const specifiers in many drivers (I hope I got all of
them, please let me know if not). Most of these are of the form:

static const struct bzzt_type {
[...list of members...]
} const bzzt_devs[] = {
[...list of initializers...]
};

The second const is unnecessary, as arrays cannot be modified anyway,
and if the elements are const, the whole thing is const automatically
(e.g. it is placed in .rodata).

I have verified this does not change the binary output of a full kernel
build (except for build timestamps embedded in the object files).

Reviewed by: yongari, marius

MFC: r233282

- First pass at const'ifying ata(4) as appropriate.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.

Copy head to stable/9 as part of 9.0-RELEASE release cycle.

Approved by: re (implicit)

Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by: mav
MFC after: 1 month

Do hard reset before soft reset for SATA channels. Soft reset reported to be
not enough to restore device readiness in some situations.

Tested by: Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.

Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.

Reported by: many
Reviewed by: mav
MFC after: 3 weeks

Following r209299, level interrupts are low by default on PPC, so remove
the hack here to reprogram the interrupt for K2 SATA devices.

Some revisions of the Serverworks K2 SATA controller have a data
corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.

This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.

Observer on: Xserve G5
Reviewed by: mav
MFC after: 1 week

Correct the comment. We now use level low instead of edge high for this
interrupt.

Partially revert r208162 while waiting for review on a more comprehensive
fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.

This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.

MFC after: 3 days

Relocate interrupt sense setting for K2 SATA from the ATA driver to the
OFW PCI layer and read the sense directly from the device tree instead
of guessing.

MFC after: 1 week

Serverworks OSB4 has no 0x4a (piomode) register, do not touch it.
Also OSB4 has some problems with UDMA transfers, limit it to WDMA2.

MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by: nwitehorn (powerpc part)

MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.

Add some magic taken from OS X and Linux to support early revision K2
SATA controllers, like those found on the G5 Xserve.

Reviewed by: mav

MFp4:
Reduce default PCI ATA drivers priorities from absolute to default,
to allow them been overriden. It was so before modularization.

The Serverworks SATA chipsets used in Apple G5 systems require requiring
the ATA status register with a 4-byte read request. This updates it, and
subsequent 1-byte reads will return the correct result.

This commit adds a hack to do this, which is currently ifdef'd powerpc,
although Linux and Darwin do this unconditionally on all platforms.

Quite mechanical ch_detach implementations for all atapci subdrivers.
Some dmainit call fixes for previous commit.

As soon as they called in only same one place (ata_pcichannel_attach()),
join allocate() and dmainit() atapci subdriver's channel initialization
methods into single ch_attach() method.

As opposite to ch_attach() add new ch_detach() method to deallocate/disable
channel.

- For chipsets that can't do 64k transfers, fall back to 32k transfers
(still a power of 2) rather than 63k transfers. Even with 63k transfers
some machines (such as Dell SC1435's) were experiencing chronic data
corruption.
- Use the MIO method to talk to the Serverworks HT1000_S1 SATA controller
like all the other SATA controllers rather than the compat PATA
method. This lets the controller see all 4 SATA ports and also
matches the behavior of the Linux driver.

Silence from: sos
MFC after: 3 days

This is the roumored ATA modulerisation works, and it needs a little explanation.

If you just config KERNEL as usual there should be no apparent changes, you'll get all chipset support code compiled in.

However there is now a way to only compile in code for chipsets needed on a pr vendor basis. ATA now has the following "device" entries:

atacore: ATA core functionality, always needed for any ATA setup

atacard: CARDBUS support
atacbus: PC98 cbus support
ataisa: ISA bus support
atapci: PCI bus support only generic chipset support.

ataahci: AHCI support, also pulled in by some vendor modules.

ataacard, ataacerlabs, ataadaptec, ataamd, ataati, atacenatek, atacypress, atacyrix, atahighpoint, ataintel, ataite, atajmicron, atamarvell, atamicron, atanational, atanetcell, atanvidia, atapromise, ataserverworks, atasiliconimage, atasis, atavia; Vendor support, ie atavia for VIA chipsets

atadisk: ATA disk driver
ataraid: ATA softraid driver

atapicd: ATAPI cd/dvd driver
atapifd: ATAPI floppy/flashdisk driver
atapist: ATAPI tape driver

atausb: ATA<>USB bridge
atapicam: ATA<>CAM bridge

This makes it possible to config a kernel with just VIA chipset support by having the following ATA lines in the kernel config file:

device atacore
device atapci
device atavia

And then you need the atadisk, atapicd etc lines in there just as usual.

If you use ATA as modules loaded at boot there is few changes except the rename of the "ata" module to "atacore", things looks just as usual.
However under atapci you now have a whole bunch of vendor specific drivers, that you can kldload individually depending on you needs. Drivers have the same names as used in the kernel config explained above.