Copy stable/9 to releng/9.3 as part of the 9.3-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC: r225882

Remove pointless semicolons after label

MFC: r234293

Generate an obviously missing STOP when having finished transmitting data.
This fixes communication with PCF8563.

MFC: r234281

- Try to bring these files closer to style(9).
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers.

Copy head to stable/9 as part of 9.0-RELEASE release cycle.

Approved by: re (implicit)

if_ate.c:

* Support for sam9 "EMAC" controller.
* Support for rmii interface to phy.

at91.c & at91sam9.c:

* Eliminate separate at91sam9.c file.
* Add new devices to at91sam9_devs table.

at91_machdep.c & at at91sam9_machdep.c:

* Automatic chip type determination.
* Remove compile time chip dependencies.
* Eliminate separate at91sam9_machdep.c file.

at91_pmc.c:

* Corrected support for all of the sam926? and sam9g20 chips.
* Remove compile time chip dependencies.

My apologies to Greg for taking so long to take care of it.

The TWI controller automatically stops if we don't fill up with new data in
time.

fix off by one error for twi reads with len != 1.
STOP must be requested before the last byte is received.

strict kobj signatures: number of fixes for arm architecture

no functional changes should result

Reviewed by: imp, current@
Approved by: jhb (mentor)

Use at91_master_clock instead of AT91C_MASTER_CLOCK.

Tweak the disclaimer section of the license to match COPYRIGHT, for
better or worse. Ok'd by folks that have additional copyrights to the
files in cases where there's joint authorship.

Add locking to the various iicbus(4) bridge drivers:
- Just grab Giant in the ixp425_iic(4) driver since this driver uses
a shared address/data register window pair to access the actual
I2C registers. None of the other ixp425 drivers lock access to these
shared address/data registers yet and that would need to be done before
this could use any meaningful locking.
- Add locking to the interrupt handler and 'iicbus_reset' methods of the
at91_twi(4) driver.
- Add locking to the pcf(4) driver. Other pcf(4) fixes include:
- Don't needlessly zero the softc.
- Use bus_foo rather than bus_space_foo and remove bus space tag and
handle from softc.
- The lpbb(4) driver just grabs Giant for now. This will be refined later
when ppbus(4) is locked.
- As was done with smbus earlier, move the DRIVER_MODULE() lines to match
the bus driver (either iicbus or iicbb) to the bridge driver into the
bridge drivers.

Tested by: sam (arm/ixp425)

Release the resources for the registers for the TWI device with
SYS_RES_MEMORY to match how we allocate them...

Noticed by: Ian Lepore

MFp4: A bunch of patches from myself and Tisco to improve the
robustness of IIC transactions when parts aren't present. This also
removes a bunch of debug. This also moves this driver to 7-1
addressing rather than 6-0 addressing, which is more inline with all
the other iic drivers in the tree. I've tested this for about a
million years on the systems at work.

o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@

at91_twi depends on the iicbus module to satisfy its symbols when
loaded, so make that explicit. Works for the monolithic kernel case,
won't work for the kldload case.

Make this work a lot better:
Remove a lot of older cruft not needed.
Improve ISR support, but it is still unused since polling is faster
Properly initalize the speed register to get 90kb/s, not 400b/s.
Try to catch NACK
Allow 0 length read transfers to generate start/top pairs.

MFp4: Make it work :-)
o Don't delay when checking the done bits. There's no gain other
than a small performance hit.
o calculate the clock divisors better (things are still way slow,
so maybe there's more here?)
o don't always fail reset. Always succeed instead.
o fix inverted logic around at91_twi_wait() return value
o remove debug code
o remove unneeded, unworking junk

Progress commit for getting TWI working

MFp4: first cut at getting I2C transfers working (generically). I'm
unsure if this driver correctly implements all the start/stop junk
right (but it did or didn't before I made this commit).

MFp4: tweaks

Connect twi to the FreeBSD iicbus infrastructure.

Import support for the Atmel AT91RM9200 CPU/Microcontroller. This SoC
is a ARM920T based CPU with a bunch of built-in peripherals. The
inital import supports the SPI bus, the TWI bus (although iicbus
integration is not complete), the uarts, the system timer and the
onboard ethernet. Support for the Kwikbyte KB9202
(http://www.kwikbyte.com) board is also included, although there's no
reason why the 9200 and the 9201 wouldn't also work. Primitive
support for running under the skyeye emulator is also provided
(although skyeye's support for the AT91RM9200 is a little weak).

The code has been structured so that other members of Atmel's arm family can
be supported in the future. The AT91SAM9260 is not presently supported
due to lack of hardware. The arm7tdmi families are also not supported
becasue they lack an MMU.

Many thanks to cognet@ for his help and assistance in bringing up this
board. He did much of the vm work and wrote parts of the uart and
system timer code as well as the bus space implementation.

The system boots to single user w/o problem, although the serial
console is a little slow and the ethernet driver is still in flux.

This work was sponsored by Timing Solutions, Corporation. I am
grateful to their support of the FreeBSD project in this manner.