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303975 |
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11-Aug-2016 |
gjb |
Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, and rename it to RC1.
Update __FreeBSD_version.
Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and the dvd1.iso packages population.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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302408 |
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08-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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302362 |
|
06-Jul-2016 |
ngie |
Fix gcc warnings
- Remove -Wunused-but-set-variable (newcpu) - Always return VMEXIT_CONTINUE as the code always set retval to that value.
Approved by: re (gjb) Differential Revision: https://reviews.freebsd.org/D7119 MFC after: 1 week Reported by: Jenkins Reviewed by: grehan (maintainer) Sponsored by: EMC / Isilon Storage Division
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302332 |
|
04-Jul-2016 |
grehan |
Import bhyve_graphics into CURRENT. Thanks to all who tested this on the branch.
Original commit message: Initial bhyve native graphics support.
This adds emulations for a raw framebuffer device, PS2 keyboard/mouse, XHCI USB controller and a USB tablet.
A simple VNC server is provided for keyboard/mouse input, and graphics output.
A VGA emulation is included, but is currently disconnected until an additional bhyve change to block out VGA memory is committed.
Credits: - raw framebuffer, VNC server, XHCI controller, USB bus/device emulation and UEFI f/w support by Leon Dang - VGA, console/g, initial VNC server by tychon@ - PS2 keyboard/mouse jointly done by tychon@ and Leon Dang - hypervisor framebuffer mem support by neel@
Tested by: Michael Dexter, in a number of revisions of this code.
With the appropriate UEFI image, FreeBSD, Windows and Linux guests can installed and run in graphics mode using the UEFI/GOP framebuffer.
Approved by: re (gjb)
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302211 |
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26-Jun-2016 |
novel |
bhyve: improve memory size documentation
A couple of minor memory size option related nits:
- use common name 'memsize' (instead of 'max-size' or just 'size') - bhyve: update usage with memsize unit suffix, drop legacy "MB" unit - bhyveload: update usage with memsize unit suffix - bhyve(8): document default size - bhyveload(8): use memsize formatting like it's done in bhyve(8)
Reviewed by: wblock, grehan Approved by: re (kib), wblock, grehan Differential Revision: https://reviews.freebsd.org/D6952
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292982 |
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31-Dec-2015 |
bz |
Remove unused variable after r292981 to unbreak the build.
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292981 |
|
31-Dec-2015 |
araujo |
Clean up unused-but-set-variable spotted by gcc-4.9.
Reviewed by: grehan Approved by: rodrigc (mentor) Differential Revision: https://reviews.freebsd.org/D4734
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289746 |
|
22-Oct-2015 |
ngie |
Exit with a user-friendly message instead of tripping an assert if vm_activate_cpu(..) fails when called from fbsdrun_addcpu(..)
MFC after: 1 week PR: 203884 Reviewed by: grehan Submitted by: William Orr <will@worrbase.com>
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288522 |
|
02-Oct-2015 |
grehan |
Simple sysctl-like firmware query interface. Similar in operation to the qemu one, and uses the same i/o ports but with different messaging. Requires the 'bootrom' option to be enabled.
This is used by UEFI (and potentially other BIOSs/firmware) to request information from bhyve. Currently, only the number of vCPUs is made available, with more to follow.
A very large thankyou to Ben Perrault who helped out testing an earlier version of this, and bhyve/Windows in general.
Reviewed by: tychon Discussed with: neel Sponsored by: Nahanni Systems
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284539 |
|
18-Jun-2015 |
neel |
Restructure memory allocation in bhyve to support "devmem".
devmem is used to represent MMIO devices like the boot ROM or a VESA framebuffer where doing a trap-and-emulate for every access is impractical. devmem is a hybrid of system memory (sysmem) and emulated device models.
devmem is mapped in the guest address space via nested page tables similar to sysmem. However the address range where devmem is mapped may be changed by the guest at runtime (e.g. by reprogramming a PCI BAR). Also devmem is usually mapped RO or RW as compared to RWX mappings for sysmem.
Each devmem segment is named (e.g. "bootrom") and this name is used to create a device node for the devmem segment (e.g. /dev/vmm/testvm.bootrom). The device node supports mmap(2) and this decouples the host mapping of devmem from its mapping in the guest address space (which can change).
Reviewed by: tychon Discussed with: grehan Differential Revision: https://reviews.freebsd.org/D2762 MFC after: 4 weeks
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283657 |
|
28-May-2015 |
neel |
Fix non-deterministic delays when accessing a vcpu that was in "running" or "sleeping" state. This is done by forcing the vcpu to transition to "idle" by returning to userspace with an exit code of VM_EXITCODE_REQIDLE.
MFC after: 2 weeks
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281611 |
|
16-Apr-2015 |
neel |
If the number of guest vcpus is less than '1' then flag it as an error.
MFC after: 1 week
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281561 |
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15-Apr-2015 |
tychon |
Prior to aborting due to an ioport error, it is always interesting to see what the guest's %rip is.
Reviewed by: grehan
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280968 |
|
01-Apr-2015 |
tychon |
Prior to aborting due to an instruction emulation error, it is always interesting to see what the guest's %rip and instruction bytes are.
Reviewed by: grehan
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#
279225 |
|
24-Feb-2015 |
neel |
Add "-u" option to bhyve(8) to indicate that the RTC should maintain UTC time.
The default remains localtime for compatibility with the original device model in bhyve(8). This is required for OpenBSD guests which assume that the RTC keeps UTC time.
Reviewed by: grehan Pointed out by: Jason Tubnor (jason@tubnor.net) MFC after: 2 weeks
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#
277310 |
|
18-Jan-2015 |
neel |
Simplify instruction restart logic in bhyve.
Keep track of the next instruction to be executed by the vcpu as 'nextrip'. As a result the VM_RUN ioctl no longer takes the %rip where a vcpu should start execution.
Also, instruction restart happens implicitly via 'vm_inject_exception()' or explicitly via 'vm_restart_instruction()'. The APIs behave identically in both kernel and userspace contexts. The main beneficiary is the instruction emulation code that executes in both contexts.
bhyve(8) VM exit handlers now treat 'vmexit->rip' and 'vmexit->inst_length' as readonly: - Restarting an instruction is now done by calling 'vm_restart_instruction()' as opposed to setting 'vmexit->inst_length' to 0 (e.g. emulate_inout()) - Resuming vcpu at an arbitrary %rip is now done by setting VM_REG_GUEST_RIP as opposed to changing 'vmexit->rip' (e.g. vmexit_task_switch())
Differential Revision: https://reviews.freebsd.org/D1526 Reviewed by: grehan MFC after: 2 weeks
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273375 |
|
21-Oct-2014 |
neel |
Merge projects/bhyve_svm into HEAD.
After this change bhyve supports AMD processors with the SVM/AMD-V hardware extensions.
More details available here: https://lists.freebsd.org/pipermail/freebsd-virtualization/2014-October/002905.html
Submitted by: Anish Gupta (akgupt3@gmail.com) Tested by: Benjamin Perrault (ben.perrault@gmail.com) Tested by: Willem Jan Withagen (wjw@digiware.nl)
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271888 |
|
20-Sep-2014 |
neel |
Restructure the MSR handling so it is entirely handled by processor-specific code. There are only a handful of MSRs common between the two so there isn't too much duplicate functionality.
The VT-x code has the following types of MSRs:
- MSRs that are unconditionally saved/restored on every guest/host context switch (e.g., MSR_GSBASE).
- MSRs that are restored to guest values on entry to vmx_run() and saved before returning. This is an optimization for MSRs that are not used in host kernel context (e.g., MSR_KGSBASE).
- MSRs that are emulated and every access by the guest causes a trap into the hypervisor (e.g., MSR_IA32_MISC_ENABLE).
Reviewed by: grehan
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#
269094 |
|
25-Jul-2014 |
neel |
Simplify the meaning of return values from the inout handlers. After this change 0 means success and non-zero means failure.
This also helps to eliminate VMEXIT_POWEROFF and VMEXIT_RESET as return values from VM-exit handlers.
CR: D480 Reviewed by: grehan, jhb
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#
269042 |
|
24-Jul-2014 |
neel |
Fix fault injection in bhyve.
The faulting instruction needs to be restarted when the exception handler is done handling the fault. bhyve now does this correctly by setting 'vmexit[vcpu].inst_length' to zero so the %rip is not advanced.
A minor complication is that the fault injection APIs are used by instruction emulation code that is shared by vmm.ko and bhyve. Thus the argument that refers to 'struct vm *' in kernel or 'struct vmctx *' in userspace needs to be loosely typed as a 'void *'.
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#
269008 |
|
23-Jul-2014 |
neel |
Emulate instructions emitted by OpenBSD/i386 version 5.5: - CMP REG, r/m - MOV AX/EAX/RAX, moffset - MOV moffset, AX/EAX/RAX - PUSH r/m
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#
268889 |
|
19-Jul-2014 |
neel |
Handle nested exceptions in bhyve.
A nested exception condition arises when a second exception is triggered while delivering the first exception. Most nested exceptions can be handled serially but some are converted into a double fault. If an exception is generated during delivery of a double fault then the virtual machine shuts down as a result of a triple fault.
vm_exit_intinfo() is used to record that a VM-exit happened while an event was being delivered through the IDT. If an exception is triggered while handling the VM-exit it will be treated like a nested exception.
vm_entry_intinfo() is used by processor-specific code to get the event to be injected into the guest on the next VM-entry. This function is responsible for deciding the disposition of nested exceptions.
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#
268777 |
|
16-Jul-2014 |
neel |
Add emulation for legacy x86 task switching mechanism.
FreeBSD/i386 uses task switching to handle double fault exceptions and this change enables that to work.
Reported by: glebius
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267966 |
|
27-Jun-2014 |
neel |
Add post-mortem debugging for "EPT Misconfiguration" VM-exit. This error is hard to reproduce so try to collect all the breadcrumbs when it happens.
Reviewed by: grehan
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#
267959 |
|
27-Jun-2014 |
jhb |
Sort command flags in usage output and the manpages.
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267934 |
|
26-Jun-2014 |
jhb |
- Document -b to enable the bvmcons console (but mark it as deprecated similar to -g.) - Document -U to set the SMBIOS UUID. - Add missing options to the usage output and to the manpage Synopsis. - Don't claim that bvmdebug is amd64-only (it is also a device, not an option).
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#
266933 |
|
31-May-2014 |
neel |
Activate vcpus from bhyve(8) using the ioctl VM_ACTIVATE_CPU instead of doing it implicitly in vmm.ko.
Add ioctl VM_GET_CPUS to get the current set of 'active' and 'suspended' cpus and display them via /usr/sbin/bhyvectl using the "--get-active-cpus" and "--get-suspended-cpus" options.
This is in preparation for being able to reset virtual machine state without having to destroy and recreate it.
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#
266573 |
|
23-May-2014 |
neel |
Add emulation of the "outsb" instruction. NetBSD guests use this to write to the UART FIFO.
The emulation is constrained in a number of ways: 64-bit only, doesn't check for all exception conditions, limited to i/o ports emulated in userspace.
Some of these constraints will be relaxed in followup commits.
Requested by: grehan Reviewed by: tychon (partially and a much earlier version)
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#
266125 |
|
15-May-2014 |
jhb |
Implement a PCI interrupt router to route PCI legacy INTx interrupts to the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements.
Reviewed by: tycho
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#
265951 |
|
13-May-2014 |
neel |
Don't include the guest memory segments in the bhyve(8) process core dump. This has not added a lot of value when debugging bhyve issues while greatly increasing the time and space required to store the core file.
Passing the "-C" option to bhyve(8) will change the default and dump guest memory in the core dump.
Requested by: grehan Reviewed by: grehan
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#
265941 |
|
12-May-2014 |
neel |
abort(3) the process in response to a VMEXIT_ABORT. This usually happens in response to an unhandled VM exit or an unexpected error so a core is useful.
Remove unused macro VMEXIT_SWITCH.
Reviewed by: grehan
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#
265376 |
|
05-May-2014 |
neel |
Modify the "-p" option to be more flexible when associating a 'vcpu' with a 'hostcpu'. The new format of the argument string is "vcpu:hostcpu".
This allows pinning a subset of the vcpus if desired.
It also allows pinning a vcpu to more than a single 'hostcpu'.
Submitted by: novel (initial version)
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#
265366 |
|
05-May-2014 |
neel |
Remove misleading "addcpu" in an error message emitted by fbsdrun_deletecpu().
Pointed out by: novel
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#
265211 |
|
02-May-2014 |
neel |
Don't allow MPtable generation if there are multiple PCI hierarchies. This is because there isn't a standard way to relay this information to the guest OS.
Add a command line option "-Y" to bhyve(8) to inhibit MPtable generation.
If the virtual machine is using PCI devices on buses other than 0 then it can still use ACPI tables to convey this information to the guest.
Discussed with: grehan@
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#
265203 |
|
02-May-2014 |
neel |
Add logic in the HLT exit handler to detect if the guest has put all vcpus to sleep permanently by executing a HLT with interrupts disabled.
When this condition is detected the guest with be suspended with a reason of VM_SUSPEND_HALT and the bhyve(8) process will exit.
Tested by executing "halt" inside a RHEL7-beta guest.
Discussed with: grehan@ Reviewed by: jhb@, tychon@
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265101 |
|
29-Apr-2014 |
neel |
Some Linux guests will implement a 'halt' by disabling the APIC and executing the 'HLT' instruction. This condition was detected by 'vm_handle_hlt()' and converted into the SPINDOWN_CPU exitcode . The bhyve(8) process would exit the vcpu thread in response to a SPINDOWN_CPU and when the last vcpu was spun down it would reset the virtual machine via vm_suspend(VM_SUSPEND_RESET).
This functionality was broken in r263780 in a way that made it impossible to kill the bhyve(8) process because it would loop forever in vm_handle_suspend().
Unbreak this by removing the code to spindown vcpus. Thus a 'halt' from a Linux guest will appear to be hung but this is consistent with the behavior on bare metal. The guest can be rebooted by using the bhyvectl options '--force-reset' or '--force-poweroff'.
Reviewed by: grehan@
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#
265062 |
|
28-Apr-2014 |
neel |
Allow a virtual machine to be forcibly reset or powered off. This is done by adding an argument to the VM_SUSPEND ioctl that specifies how the virtual machine should be suspended, viz. VM_SUSPEND_RESET or VM_SUSPEND_POWEROFF.
The disposition of VM_SUSPEND is also made available to the exit handler via the 'u.suspended' member of 'struct vm_exit'.
This capability is exposed via the '--force-reset' and '--force-poweroff' arguments to /usr/sbin/bhyvectl.
Discussed with: grehan@
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#
264916 |
|
25-Apr-2014 |
tychon |
Provide a very basic stub for the 8042 PS/2 keyboard controller.
Reviewed by: jhb Approved by: neel (co-mentor)
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#
263780 |
|
26-Mar-2014 |
neel |
Add an ioctl to suspend a virtual machine (VM_SUSPEND). The ioctl can be called from any context i.e., it is not required to be called from a vcpu thread. The ioctl simply sets a state variable 'vm->suspend' to '1' and returns.
The vcpus inspect 'vm->suspend' in the run loop and if it is set to '1' the vcpu breaks out of the loop with a reason of 'VM_EXITCODE_SUSPENDED'. The suspend handler waits until all 'vm->active_cpus' have transitioned to 'vm->suspended_cpus' before returning to userspace.
Discussed with: grehan
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#
263432 |
|
20-Mar-2014 |
neel |
Use 'cpuset_t' to represent the vcpus active in a virtual machine.
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#
262744 |
|
04-Mar-2014 |
tychon |
Add SMBIOS support.
A new option, -U, can be used to set the UUID in the System Information (Type 1) structure. Manpage fix to follow.
Approved by: grehan (co-mentor)
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#
262506 |
|
26-Feb-2014 |
neel |
Queue pending exceptions in the 'struct vcpu' instead of directly updating the processor-specific VMCS or VMCB. The pending exception will be delivered right before entering the guest.
The order of event injection into the guest is: - hardware exception - NMI - maskable interrupt
In the Intel VT-x case, a pending NMI or interrupt will enable the interrupt window-exiting and inject it as soon as possible after the hardware exception is injected. Also since interrupts are inherently asynchronous, injecting them after the hardware exception should not affect correctness from the guest perspective.
Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict it to only deliver x86 hardware exceptions. This new ioctl is now used to inject a protection fault when the guest accesses an unimplemented MSR.
Discussed with: grehan, jhb Reviewed by: jhb
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262236 |
|
20-Feb-2014 |
neel |
Simplify APIC mode switching from MMIO to x2APIC. In part this is done to simplify the implementation of the x2APIC virtualization assist in VT-x.
Prior to this change the vlapic allowed the guest to change its mode from xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked when the virtual machine is created. This is not very constraining because operating systems already have to deal with BIOS setting up the APIC in x2APIC mode at boot.
Fix a bug in the CPUID emulation where the x2APIC capability was leaking from the host to the guest.
Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore MSR accesses to the vlapic when it is in xAPIC mode.
The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8) can be used to change the mode to x2APIC instead.
Discussed with: grehan@
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#
261268 |
|
29-Jan-2014 |
jhb |
Enhance the support for PCI legacy INTx interrupts and enable them in the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends.
Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
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261217 |
|
27-Jan-2014 |
jhb |
Remove support for legacy PCI devices. These haven't been needed since support for LPC uart devices was added and it conflicts with upcoming patches to add PCI INTx support.
Reviewed by: neel
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#
260167 |
|
01-Jan-2014 |
neel |
Restructure the VMX code to enter and exit the guest. In large part this change hides the setjmp/longjmp semantics of VM enter/exit. vmx_enter_guest() is used to enter guest context and vmx_exit_guest() is used to transition back into host context.
Fix a longstanding race where a vcpu interrupt notification might be ignored if it happens after vmx_inject_interrupts() but before host interrupts are disabled in vmx_resume/vmx_launch. We now called vmx_inject_interrupts() with host interrupts disabled to prevent this.
Suggested by: grehan@
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#
259826 |
|
24-Dec-2013 |
jhb |
Support soft power-off via the ACPI S5 state for bhyve guests. - Implement the PM1_EVT and PM1_CTL registers required by ACPI. The PM1_EVT register is mostly a dummy as bhyve doesn't support any of the hardware-initiated events. The only bit of PM1_CNT that is implemented are the sleep request bits (SPL_EN and SLP_TYP) which request a graceful power off for S5. In particular, for S5, bhyve exits with a non-zero value which terminates the loop in vmrun.sh. - Emulate the Reset Control register at I/O port 0xcf9 and advertise it as the reset register via ACPI. - Advertise an _S5 package. - Extend the in/out interface to allow an in/out handler to request that the hypervisor trigger a reset or power-off. - While here, note that all vCPUs in a guest support C1 ("hlt").
Reviewed by: neel (earlier version)
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#
259737 |
|
22-Dec-2013 |
neel |
Add a parameter to 'vcpu_set_state()' to enforce that the vcpu is in the IDLE state before the requested state transition. This guarantees that there is exactly one ioctl() operating on a vcpu at any point in time and prevents unintended state transitions.
More details available here: http://lists.freebsd.org/pipermail/freebsd-virtualization/2013-December/001825.html
Reviewed by: grehan Reported by: Markiyan Kushnir (markiyan.kushnir at gmail.com) MFC after: 3 days
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#
259635 |
|
19-Dec-2013 |
neel |
Add an option to ignore accesses by the guest to unimplemented MSRs.
Also, ignore a couple of SandyBridge uncore PMC MSRs that Centos 6.4 writes to during boot.
Reviewed by: grehan
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#
259081 |
|
07-Dec-2013 |
neel |
If a vcpu disables its local apic and then executes a 'HLT' then spin down the vcpu and destroy its thread context. Also modify the 'HLT' processing to ignore pending interrupts in the IRR if interrupts have been disabled by the guest. The interrupt cannot be injected into the guest in any case so resuming it is futile.
With this change "halt" from a Linux guest works correctly.
Reviewed by: grehan@ Tested by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com)
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#
258075 |
|
12-Nov-2013 |
neel |
Move the ioapic device model from userspace into vmm.ko. This is needed for upcoming in-kernel device emulations like the HPET.
The ioctls VM_IOAPIC_ASSERT_IRQ and VM_IOAPIC_DEASSERT_IRQ are used to manipulate the ioapic pin state.
Discussed with: grehan@ Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com)
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#
257729 |
|
06-Nov-2013 |
grehan |
Add the VM name to the process name with setproctitle(). Remove the VM name from some of the thread-naming calls since it is now in the proc title. Slightly modify the thread-naming for the net and block threads.
This improves readability when using top/ps with the -a and -H options on a system with a large number of bhyve VMs.
Requested by: Michael Dexter Reviewed by: neel MFC after: 4 weeks
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#
257423 |
|
31-Oct-2013 |
neel |
Make the virtual ioapic available unconditionally in a bhyve virtual machine.
This is in preparation for moving the ioapic device model from userspace to vmm.ko.
Reviewed by: grehan
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#
257293 |
|
29-Oct-2013 |
neel |
Add support for PCI-to-ISA LPC bridge emulation. If the LPC bus is attached to a virtual machine then we implicitly create COM1 and COM2 ISA devices.
Prior to this change the only way of attaching a COM port to the virtual machine was by presenting it as a PCI device that is mapped at the legacy I/O address 0x3F8 or 0x2F8.
There were some issues with the original approach: - It did not work at all with UEFI because UEFI will reprogram the PCI device BARs and remap the COM1/COM2 ports at non-legacy addresses. - OpenBSD GENERIC kernel does not create a /dev/console because it expects the uart device at the legacy 0x3F8/0x2F8 address to be an ISA device. - It was functional with a FreeBSD guest but caused the console to appear on /dev/ttyu2 which was not intuitive.
The uart emulation is now independent of the bus on which it resides. Thus it is possible to have uart devices on the PCI bus in addition to the legacy COM1/COM2 devices behind the LPC bus.
The command line option to attach ISA COM1/COM2 ports to a virtual machine is "-s <bus>,lpc -l com1,stdio".
The command line option to create a PCI-attached uart device is: "-s <bus>,uart[,stdio]"
The command line option to create PCI-attached COM1/COM2 device is: "-S <bus>,uart[,stdio]". This style of creating COM ports is deprecated.
Discussed with: grehan Reviewed by: grehan Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com)
M share/examples/bhyve/vmrun.sh AM usr.sbin/bhyve/legacy_irq.c AM usr.sbin/bhyve/legacy_irq.h M usr.sbin/bhyve/Makefile AM usr.sbin/bhyve/uart_emul.c M usr.sbin/bhyve/bhyverun.c AM usr.sbin/bhyve/uart_emul.h M usr.sbin/bhyve/pci_uart.c M usr.sbin/bhyve/pci_emul.c M usr.sbin/bhyve/inout.c M usr.sbin/bhyve/pci_emul.h M usr.sbin/bhyve/inout.h AM usr.sbin/bhyve/pci_lpc.c AM usr.sbin/bhyve/pci_lpc.h
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#
257018 |
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23-Oct-2013 |
neel |
Tidy usage messages for bhyve and bhyveload.
Submitted by: jhb
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256711 |
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17-Oct-2013 |
grehan |
Changes required for OpenBSD/amd64:
- Allow a hostbridge to be created with AMD as a vendor. This passes the OpenBSD check to allow the use of MSI on a PCI bus. - Enable the i/o interrupt section of the mptable, and populate it with unity ISA mappings. This allows the 'legacy' IRQ mappings of the PCI serial port to be set up. Delete unused print routine that was obscuring code. - Use the '-W' option to enable virtio single-vector MSI rather than an environment variable. Update the virtio net/block drivers to query this flag when setting up interrupts.: bhyverun.c - Fix the arithmetic used to derive the century byte in RTC CMOS, as well as encoding it in BCD.
Reviewed by: neel MFC after: 3 days
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#
256645 |
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16-Oct-2013 |
neel |
Add a new capability, VM_CAP_ENABLE_INVPCID, that can be enabled to expose 'invpcid' instruction to the guest. Currently bhyve will try to enable this capability unconditionally if it is available.
Consolidate code in bhyve to set the capabilities so it is no longer duplicated in BSP and AP bringup.
Add a sysctl 'vm.pmap.invpcid_works' to display whether the 'invpcid' instruction is available.
Reviewed by: grehan MFC after: 3 days
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#
256176 |
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09-Oct-2013 |
neel |
Parse the memory size parameter using expand_number() to allow specifying the memory size more intuitively (e.g. 512M, 4G etc).
Submitted by: rodrigc Reviewed by: grehan Approved by: re (blanket)
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256158 |
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08-Oct-2013 |
dim |
After r256062, the static function fbsdrun_get_next_cpu() in usr.sbin/bhyve/bhyverun.c is no longer used, so remove it to silence a gcc warning.
Approved by: re (glebius)
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256156 |
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08-Oct-2013 |
neel |
Change the behavior of bhyve such that the gdb listening port is opt-in rather than opt-out.
Prior to this change if the "-g" option was not specified then a listening socket for tunneling gdb packets would be opened at port 6466. If a second virtual machine is fired up, also without the "-g" option, then that would fail because there is already a listener on port 6466.
After this change if a gdb tunnel port needs to be created it needs to be explicitly specified with a "-g <portnum>" command line option.
Reviewed by: grehan@ Approved by: re@ (blanket)
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256072 |
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05-Oct-2013 |
neel |
Merge projects/bhyve_npt_pmap into head.
Make the amd64/pmap code aware of nested page table mappings used by bhyve guests. This allows bhyve to associate each guest with its own vmspace and deal with nested page faults in the context of that vmspace. This also enables features like accessed/dirty bit tracking, swapping to disk and transparent superpage promotions of guest memory.
Guest vmspace: Each bhyve guest has a unique vmspace to represent the physical memory allocated to the guest. Each memory segment allocated by the guest is mapped into the guest's address space via the 'vmspace->vm_map' and is backed by an object of type OBJT_DEFAULT.
pmap types: The amd64/pmap now understands two types of pmaps: PT_X86 and PT_EPT.
The PT_X86 pmap type is used by the vmspace associated with the host kernel as well as user processes executing on the host. The PT_EPT pmap is used by the vmspace associated with a bhyve guest.
Page Table Entries: The EPT page table entries as mostly similar in functionality to regular page table entries although there are some differences in terms of what bits are used to express that functionality. For e.g. the dirty bit is represented by bit 9 in the nested PTE as opposed to bit 6 in the regular x86 PTE. Therefore the bitmask representing the dirty bit is now computed at runtime based on the type of the pmap. Thus PG_M that was previously a macro now becomes a local variable that is initialized at runtime using 'pmap_modified_bit(pmap)'.
An additional wrinkle associated with EPT mappings is that older Intel processors don't have hardware support for tracking accessed/dirty bits in the PTE. This means that the amd64/pmap code needs to emulate these bits to provide proper accounting to the VM subsystem. This is achieved by using the following mapping for EPT entries that need emulation of A/D bits: Bit Position Interpreted By PG_V 52 software (accessed bit emulation handler) PG_RW 53 software (dirty bit emulation handler) PG_A 0 hardware (aka EPT_PG_RD) PG_M 1 hardware (aka EPT_PG_WR)
The idea to use the mapping listed above for A/D bit emulation came from Alan Cox (alc@).
The final difference with respect to x86 PTEs is that some EPT implementations do not support superpage mappings. This is recorded in the 'pm_flags' field of the pmap.
TLB invalidation: The amd64/pmap code has a number of ways to do invalidation of mappings that may be cached in the TLB: single page, multiple pages in a range or the entire TLB. All of these funnel into a single EPT invalidation routine called 'pmap_invalidate_ept()'. This routine bumps up the EPT generation number and sends an IPI to the host cpus that are executing the guest's vcpus. On a subsequent entry into the guest it will detect that the EPT has changed and invalidate the mappings from the TLB.
Guest memory access: Since the guest memory is no longer wired we need to hold the host physical page that backs the guest physical page before we can access it. The helper functions 'vm_gpa_hold()/vm_gpa_release()' are available for this purpose.
PCI passthru: Guest's with PCI passthru devices will wire the entire guest physical address space. The MMIO BAR associated with the passthru device is backed by a vm_object of type OBJT_SG. An IOMMU domain is created only for guest's that have one or more PCI passthru devices attached to them.
Limitations: There isn't a way to map a guest physical page without execute permissions. This is because the amd64/pmap code interprets the guest physical mappings as user mappings since they are numerically below VM_MAXUSER_ADDRESS. Since PG_U shares the same bit position as EPT_PG_EXECUTE all guest mappings become automatically executable.
Thanks to Alan Cox and Konstantin Belousov for their rigorous code reviews as well as their support and encouragement.
Thanks for John Baldwin for reviewing the use of OBJT_SG as the backing object for pci passthru mmio regions.
Special thanks to Peter Holm for testing the patch on short notice.
Approved by: re Discussed with: grehan Reviewed by: alc, kib Tested by: pho
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256062 |
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04-Oct-2013 |
grehan |
Remove obsolete cmd-line options and code associated with these. The mux-vcpus option may return at some point, given it's utility in finding bhyve (and FreeBSD) bugs.
Approved by: re@ (blanket) Discussed with: neel@
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253452 |
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18-Jul-2013 |
grehan |
Sanity-check the vm exitcode, and exit the process if it's out-of-bounds or there is no registered handler.
Submitted by: Bela Lubkin bela dot lubkin at tidalscale dot com
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253181 |
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11-Jul-2013 |
grehan |
Implement RTC CMOS nvram. Init some fields that are used by FreeBSD and UEFI. Tested with nvram(4).
Reviewed by: neel
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252682 |
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04-Jul-2013 |
grehan |
Support an optional "mac=" parameter to virtio-net config, to allow users to set the MAC address for a device.
Clean up some obsolete code in pci_virtio_net.c
Allow an error return from a PCI device emulation's init routine to be propagated all the way back to the top-level and result in the process exiting.
Submitted by: Dinakar Medavaram dinnu sun at gmail (original version)
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249916 |
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26-Apr-2013 |
neel |
Gripe if some <slot,function> tuple is specified more than once instead of silently overwriting the previous assignment.
Gripe if the emulation is not recognized instead of silently ignoring the emulated device.
If an error is detected by pci_parse_slot() then exit from the command line parsing loop in main().
Submitted by (initial version): Chris Torek (chris.torek@gmail.com)
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249343 |
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10-Apr-2013 |
neel |
Need to call init_mem() to really initialize the MMIO range lookups.
This was working by accident because: - the RB_HEADs were being initialized to zero as part of BSS - the pthread_rwlock functions were implicitly initializing the lock object
Obtained from: NetApp
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#
248477 |
|
18-Mar-2013 |
neel |
Simplify the assignment of memory to virtual machines by requiring a single command line option "-m <memsize in MB>" to specify the memory size.
Prior to this change the user needed to explicitly specify the amount of memory allocated below 4G (-m <lowmem>) and the amount above 4G (-M <highmem>).
The "-M" option is no longer supported by 'bhyveload' and 'bhyve'.
The start of the PCI hole is fixed at 3GB and cannot be directly changed using command line options. However it is still possible to change this in special circumstances via the 'vm_set_lowmem_limit()' API provided by libvmmapi.
Submitted by: Dinakar Medavaram (initial version) Reviewed by: grehan Obtained from: NetApp
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247523 |
|
01-Mar-2013 |
neel |
Specify the length of the mapping requested from 'paddr_guest2host()'.
This seems prudent to do in its own right but it also opens up the possibility of not having to mmap the entire guest address space in the 'bhyve' process context.
Discussed with: grehan Obtained from: NetApp
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#
246686 |
|
11-Feb-2013 |
neel |
Implement guest vcpu pinning using 'pthread_setaffinity_np(3)'.
Prior to this change pinning was implemented via an ioctl (VM_SET_PINNING) that called 'sched_bind()' on behalf of the user thread.
The ULE implementation of 'sched_bind()' bumps up 'td_pinned' which in turn runs afoul of the assertion '(td_pinned == 0)' in userret().
Using the cpuset affinity to implement pinning of the vcpu threads works with both 4BSD and ULE schedulers and has the happy side-effect of getting rid of a bunch of code in vmm.ko.
Discussed with: grehan
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#
245679 |
|
20-Jan-2013 |
neel |
Use <vmname> in a consistent manner in usage messages output by 'bhyve', 'bhyveload' and 'bhyvectl'.
Pointed out by: joel@
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#
245678 |
|
20-Jan-2013 |
neel |
Add svn properties to the recently merged bhyve source files.
The pre-commit hook will not allow any commits without the svn:keywords property in head.
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245652 |
|
19-Jan-2013 |
neel |
Merge projects/bhyve to head.
'bhyve' was developed by grehan@ and myself at NetApp (thanks!).
Special thanks to Peter Snyder, Joe Caradonna and Michael Dexter for their support and encouragement.
Obtained from: NetApp
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#
245020 |
|
04-Jan-2013 |
neel |
The "unrestricted guest" capability is a feature of Intel VT-x that allows the guest to execute real or unpaged protected mode code - bhyve relies on this feature to execute the AP bootstrap code.
Get rid of the hack that allowed bhyve to support SMP guests on processors that do not have the "unrestricted guest" capability. This hack was entirely FreeBSD-specific and would not work with any other guest OS.
Instead, limit the number of vcpus to 1 when executing on processors without "unrestricted guest" capability.
Suggested by: grehan Obtained from: NetApp
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#
244167 |
|
13-Dec-2012 |
grehan |
Rename fbsdrun.* -> bhyverun.*
bhyve is intended to be a generic hypervisor, and not FreeBSD-specific.
(renaming internal routines will come later)
Reviewed by: neel Obtained from: NetApp
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#
243651 |
|
28-Nov-2012 |
neel |
Cleanup the user-space paging exit handler now that the unified instruction emulation is in place.
Obtained from: NetApp
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#
243640 |
|
28-Nov-2012 |
neel |
Revamp the x86 instruction emulation in bhyve.
On a nested page table fault the hypervisor will: - fetch the instruction using the guest %rip and %cr3 - decode the instruction in 'struct vie' - emulate the instruction in host kernel context for local apic accesses - any other type of mmio access is punted up to user-space (e.g. ioapic)
The decoded instruction is passed as collateral to the user-space process that is handling the PAGING exit.
The emulation code is fleshed out to include more addressing modes (e.g. SIB) and more types of operands (e.g. imm8). The source code is unified into a single file (vmm_instruction_emul.c) that is compiled into vmm.ko as well as /usr/sbin/bhyve.
Reviewed by: grehan Obtained from: NetApp
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#
243327 |
|
20-Nov-2012 |
grehan |
ACPI support for bhyve.
The -A option will create the minimal set of required ACPI tables in guest memory. Since ACPI mandates an IOAPIC, the -I option must also be used.
Template ASL files are created, and then passed to the iasl compiler to generate AML files. These are then loaded into guest physical mem.
In support of this, the ACPI PM timer is implemented, in 32-bit mode.
Tested on 7.4/8.*/9.*/10-CURRENT.
Reviewed by: neel Obtained from: NetApp Discussed with: jhb (a long while back)
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242404 |
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31-Oct-2012 |
grehan |
Change the thread name of the vCPU threads to contain the name of the VM and the vCPU number. This helps hugely when using top -H to identify what a VM is doing.
Reviewed by: neel Obtained from: NetApp
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#
242385 |
|
31-Oct-2012 |
grehan |
Exit if the requested num vCPUs exceeds the maximum rather than waiting until AP bringup detects an out-of-range vCPU.
While here, fix all error output to use fprintf(stderr, ...
Reviewed by: neel Reported by: @allanjude
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242192 |
|
27-Oct-2012 |
neel |
Present the bvm console device to the guest only when explicitly requested via the "-b" command line option.
Reviewed by: grehan Obtained from: NetApp
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#
242131 |
|
26-Oct-2012 |
grehan |
Remove mptable generation code from libvmmapi and move it to bhyve. Firmware tables require too much knowledge of system configuration, and it's difficult to pass that information in general terms to a library. The upcoming ACPI work exposed this - it will also livein bhyve.
Also, remove code specific to NetApp from the mptable name, and remove the -n option from bhyve.
Reviewed by: neel Obtained from: NetApp
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241744 |
|
19-Oct-2012 |
grehan |
Rework how guest MMIO regions are dealt with.
- New memory region interface. An RB tree holds the regions, with a last-found per-vCPU cache to deal with the common case of repeated guest accesses to MMIO registers in the same page.
- Support memory-mapped BARs in PCI emulation.
mem.c/h - memory region interface
instruction_emul.c/h - remove old region interface. Use gpa from EPT exit to avoid a tablewalk to determine operand address. Determine operand size and use when calling through to region handler.
fbsdrun.c - call into region interface on paging exit. Distinguish between instruction emul error and region not found
pci_emul.c/h - implement new BAR callback api. Split BAR alloc routine into routines that require/don't require the BAR phys address.
ioapic.c pci_passthru.c pci_virtio_block.c pci_virtio_net.c pci_uart.c - update to new BAR callback i/f
Reviewed by: neel Obtained from: NetApp
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#
241490 |
|
12-Oct-2012 |
neel |
Deal with transient EBUSY error return from vm_run() by retrying the operation.
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#
240943 |
|
26-Sep-2012 |
neel |
Add an option "-a" to present the local apic in the XAPIC mode instead of the default X2APIC mode to the guest.
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#
240912 |
|
25-Sep-2012 |
neel |
Add an explicit exit code 'SPINUP_AP' to tell the controlling process that an AP needs to be activated by spinning up an execution context for it.
The local apic emulation is now completely done in the hypervisor and it will detect writes to the ICR_LO register that try to bring up the AP. In response to such writes it will return to userspace with an exit code of SPINUP_AP.
Reviewed by: grehan
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#
239045 |
|
05-Aug-2012 |
neel |
Device model for ioapic emulation.
With this change the uart emulation is entirely interrupt driven.
Obtained from: NetApp
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#
239043 |
|
04-Aug-2012 |
neel |
Add the "-I" option to control whether or not an ioapic is visible to the guest.
Obtained from: NetApp
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#
234938 |
|
03-May-2012 |
grehan |
Add 16550 uart emulation as a PCI device. This allows it to be activated as part of the slot config options. The syntax is:
-s <slotnum>,uart[,stdio]
The stdio parameter instructs the code to perform i/o using stdin/stdout. It can only be used for one instance. To allow legacy i/o ports/irqs to be used, a new variant of the slot command, -S, is introduced. When used to specify a slot, the device will use legacy resources if it supports them; otherwise it will be treated the same as the '-s' option. Specifying the -S option with the uart will first use the 0x3f8/irq 4 config, and the second -S will use 0x2F8/irq 3.
Interrupt delivery is awaiting the arrival of the i/o apic code, but this works fine in uart(4)'s polled mode.
This code was written by Cynthia Lu @ MIT while an intern at NetApp, with further work from neel@ and grehan@.
Obtained from: NetApp
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234761 |
|
28-Apr-2012 |
grehan |
MSI-x interrupt support for PCI pass-thru devices.
Includes instruction emulation for memory r/w access. This opens the door for io-apic, local apic, hpet timer, and legacy device emulation.
Submitted by: ryan dot berryhill at sandvine dot com Reviewed by: grehan Obtained from: Sandvine
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222105 |
|
19-May-2011 |
grehan |
Changes to allow the GENERIC+bhye kernel built from this branch to run as a 1/2 CPU guest on an 8.1 bhyve host.
bhyve/inout.c inout.h fbsdrun.c - Rather than exiting on accesses to unhandled i/o ports, emulate hardware by returning -1 on reads and ignoring writes to unhandled ports. Support the previous mode by allowing a 'strict' parameter to be set from the command line. The 8.1 guest kernel was vastly cut down from GENERIC and had no ISA devices. Booting GENERIC exposes a massive amount of random touching of i/o ports (hello syscons/vga/atkbdc).
bhyve/consport.c dev/bvm/bvm_console.c - implement a simplistic signature for the bvm console by returning 'bv' for an inw on the port. Also, set the priority of the console to CN_REMOTE if the signature was returned. This works better in an environment where multiple consoles are in the kernel (hello syscons)
bhyve/rtc.c - return 0 for the access to RTC_EQUIPMENT (yes, you syscons)
amd64/vmm/x86.c x86.h - hide a bunch more CPUID leaf 1 bits from the guest to prevent cpufreq drivers from probing. The next step will be to move CPUID handling completely into user-space. This will allow the full spectrum of changes from presenting a lowest-common-denominator CPU type/feature set, to exposing (almost) everything that the host can support.
Reviewed by: neel Obtained from: NetApp
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221942 |
|
15-May-2011 |
jhb |
First cut to port bhyve, vmmctl, and libvmmapi to HEAD.
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#
221828 |
|
13-May-2011 |
grehan |
Import of bhyve hypervisor and utilities, part 1. vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface
bhyve was designed and implemented by Neel Natu.
Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski
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