History log of /freebsd-11.0-release/sys/mips/nlm/intr_machdep.c
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# 303975 11-Aug-2016 gjb

Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE
cycle.

Prune svn:mergeinfo from the new branch, and rename it to RC1.

Update __FreeBSD_version.

Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and
the dvd1.iso packages population.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

# 302408 08-Jul-2016 gjb

Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation


# 279387 28-Feb-2015 jchandra

Whitespace fixes for files in sys/mips/nlm

Clean up whitespace issues under sys/mips/nlm (except dev). No
functional change in this commit.


# 279341 27-Feb-2015 jchandra

Improve additional interrupt ACK for Broadcom XLP

Handling some interrupts in XLP (like PCIe and SATA) involves writing to
vendor specific registers as part of interrupt acknowledgement.

This was earlier done with xlp_establish_intr(), but a better solution
is to provide a function xlp_set_bus_ack() that can be used with
cpu_establish_hardintr(). This will allow platform initialization code to
setup these ACKs without changing the standrard drivers.


# 279306 26-Feb-2015 jchandra

Remove run-time allocation of XLP IRQs

Follow the same static IRQ to Interrupt Table Entry mapping as the other
OS supported on XLP.


# 279305 26-Feb-2015 jchandra

Add netlogic,xlp-pic as interrupt controller for XLP

Add an empty driver for netlogic,xlp-pic to ensure that the device tree
is correct and has an interrupt controller.


# 233563 27-Mar-2012 jchandra

Update memory and resource allocation code for SoC devices

The XLP on-chip devices have PCI configuration headers, but some of the
devices need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
space have to be handled in memory resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space,
he default bus space cannot be used for these.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.


# 225394 05-Sep-2011 jchandra

MIPS XLP platform code update.

* Update the hardware access register definitions and functions to bring
them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
>32 cpus.

Approved by: re(kib), jmallett


# 224110 16-Jul-2011 jchandra

Add MIPS platform files for Netlogic XLP SoC.

Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by: bz(re), jmallett, imp(mips)