Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE
cycle.

Prune svn:mergeinfo from the new branch, and rename it to RC1.

Update __FreeBSD_version.

Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and
the dvd1.iso packages population.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Add subclass of simplebus for Broadcom XLP

This will override the resource allocation of simplebus, and also
merge the resource allocation code which was in xlp_pci.c.

With this change the SoC devices that does not have proper PCI
resources will be on the FDT simplebus. We can remove
sys/mips/nlm/dev/cfi_pci_xlp.c and sys/mips/nlm/dev/uart_pci_xlp.c

Supply endianness implied by the -m flag when compiling ucore code.

Update memory and resource allocation code for SoC devices

The XLP on-chip devices have PCI configuration headers, but some of the
devices need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
space have to be handled in memory resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space,
he default bus space cannot be used for these.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.

NOR flash driver for XLP.

The NOR interface on the SoC appears on the top level PCI bus. Add
a simple driver for this.

XLP UART code udpate.

Move XLP PCI UART device to sys/mips/nlm/dev/ directory. Other
drivers for the XLP SoC devices will be added here as well.
Update uart_cpu_xlp.c and uart_pci_xlp.c use macros for uart port,
speed and IO frequency.

xlpge : driver for XLP network accelerator

Features:
- network driver for the four 10G interfaces and two management ports
on XLP 8xx.
- Support 4xx and 3xx variants of the processor.
- Source code and firmware building for the 16 mips32r2 micro-code engines
in the Network Accelerator.
- Basic initialization code for Packet ordering Engine.

Submitted by: Prabhath Raman (prabhath at netlogicmicro com)
[refactored and fixed up for style by jchandra]

Support for EEPROM and CPLD on XLP EVP boards.

On XLP evaluation platform, the board information is stored
in an I2C eeprom and the network block configuration is available
from a CPLD connected to the GBU (NOR flash bus). Add support
for both of these.

Opencrypto driver for XLP Security and RSA/ECC blocks

Support for the Security and RSA blocks on XLP SoC. Even though
the XLP supports many more algorithms, only the ones supported
in OCF have been added.

Submitted by: Venkatesh J. V. (venkatesh at netlogicmicro com)

Merge XLP 3XX updates and related rework.

* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
venkatesh at netlogicmicro.com (PCI)

MIPS XLP platform code update.

* Update the hardware access register definitions and functions to bring
them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
>32 cpus.

Approved by: re(kib), jmallett

Add MIPS platform files for Netlogic XLP SoC.

Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by: bz(re), jmallett, imp(mips)