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303975 |
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11-Aug-2016 |
gjb |
Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, and rename it to RC1.
Update __FreeBSD_version.
Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and the dvd1.iso packages population.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
#
302408 |
|
08-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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#
301293 |
|
04-Jun-2016 |
mav |
When negotiating NTB_SB01BASE_LOCKUP workaround, don't try to limit the BAR size to 1MB. According to Xeon v3 specifications and my tests, that size register is write-once and so not writeable after BIOS written it.
Instead of that, make the code work with BAR of any sufficient size, properly calculating offset within its base. It also simplifies the code.
Discussed with: cem MFC after: 2 weeks Sponsored by: iXsystems, Inc.
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#
301292 |
|
04-Jun-2016 |
mav |
When negotiating MSIX parameters, give other head time to see our NTB_MSIX_RECEIVED status, before making upper layers overwrite it.
This is not completely perfect, but now it works better then before.
MFC after: 2 weeks Sponsored by: iXsystems, Inc.
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#
300531 |
|
23-May-2016 |
cem |
ntb_hw(4): Only record the first three MSIX vectors
Don't overrun the msix_data array by reading the (unused) link state interrupt information.
Reported by: mav (earlier version) Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D6489
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#
300100 |
|
18-May-2016 |
cem |
ntb_hw(4): Add sysctls for administrative/test link config, state
dev.ntb_hw.0.admin_up=0/1: Like ifconfig UP/DOWN. dev.ntb_hw.0.active=0/1: Like ifconfig 'status'
Reviewed by: ngie Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D6429
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#
298955 |
|
03-May-2016 |
pfg |
sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
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#
295880 |
|
22-Feb-2016 |
skra |
As <machine/pmap.h> is included from <vm/pmap.h>, there is no need to include it explicitly when <vm/pmap.h> is already included.
Reviewed by: alc, kib Differential Revision: https://reviews.freebsd.org/D5373
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#
295618 |
|
14-Feb-2016 |
cem |
NTB: workaround for high traffic hardware hang
This patch comes from Dave Jiang's Linux tree, davejiang/ntb. It hasn't been accepted into Linus' tree, so I do not have an authoritative SHA1 to point at. Original commit log:
===================================================================== A hardware errata causes the NTB to hang when heavy bi-directional traffic in addition to the usage of BAR0/1 (where the registers reside, including the doorbell registers to trigger interrupts).
This workaround is only available on Haswell and Broadwell platform. The workaround is to enable split BAR in the BIOS to allow the 64bit BAR4 to be split into two 32bit BAR4 and BAR5. The BAR4 shall be pointed to LAPIC region of the remote host. We will bypass the db mechanism and directly trigger the MSIX interrupts. The offsets and vectors are exchanged during transport scratch pad negotiation. The scratch pads are now overloaded in order to allow the exchange of the information. This gets around using the doorbell and prevents the lockup with additional pcode changes in BIOS.
Signed-off-by: Dave Jiang <dave.jiang@intel.com> =====================================================================
Notable changes in the FreeBSD version of this patch: * The MSIX BAR is configurable, like hw.ntb.b2b_mw_idx (msix_mw_idx). The Linux version of the patch only uses BAR4. * MSIX negotiation aborts if the link goes down.
Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
295487 |
|
10-Feb-2016 |
cem |
ntb_hw(4): Print correct PAT name for non-WC/WB types mapped at load
Sponsored by: EMC / Isilon Storage Division
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#
295486 |
|
10-Feb-2016 |
cem |
ntb_hw(4): Allow any x86 PAT caching flags for MW defaults
Replace the hw.ntb.enable_writecombine tunable with hw.ntb.default_mw_pat. It can be set with several specific numerical values to select a caching type. Any bogus value is treated as Uncacheable (UC).
The ntb_mw_set_wc() KPI has removed the restriction that the selected mode must be one of UC, WC, or WB.
Sponsored by: EMC / Isilon Storage Division
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#
291280 |
|
25-Nov-2015 |
cem |
NTB: WC/WB isn't enough; set MMR region as UC
And expose vm_memattr_t of current mapping to consumers (as well as the ability to change it to one of UC, WB, WC).
After short discussion with: jhb (but no review) Sponsored by: EMC / Isilon Storage Division
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#
291263 |
|
24-Nov-2015 |
cem |
ntb: Add MW tunable for MMR Xeon errata workaround
Adds a new tunable, ntb.hw.b2b_mw_idx, which specifies the offset (from the total number of memory windows) to use for register access on hardware with the SDOORBELL_LOCKUP errata. The default is -1, i.e., the last memory window.
We map BARs before the b2b_mw_idx is selected, so map them all as memory windows initially. The register memory window should not be write-combined, so we explicitly disable WC on the selected MW later.
This introduces a layer of abstraction between consumer memory window indices, which exclude any exclusive errata-workaround BARs, and internal memory window indices, which include such BARs. An internal routine, ntb_user_mw_to_idx(), converts the former to the latter. Public APIs have been updated to use this instead of assuming the exclusive workaround BAR is the last available MW.
Sponsored by: EMC / Isilon Storage Division
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#
291033 |
|
18-Nov-2015 |
cem |
NTB: Expose 32-bit BAR limits to consumers
32-bit BARs can only address memory mapped in the low 32 bits of physical RAM. Expose this as a 'plimit' out parameter from ntb_mw_get_range().
Fix if_ntb to allocate memory within this limit.
Sponsored by: EMC / Isilon Storage Division
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#
291032 |
|
18-Nov-2015 |
cem |
NTB: Mask off the low 12 bits of address/range registers
Sometimes they'll read spurious values (observed: 0xc on Broadwell-DE), failing link negotiation.
Discussed with: Dave Jiang, Allen Hubbe Sponsored by: EMC / Isilon Storage Division
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#
291031 |
|
18-Nov-2015 |
cem |
ntb_hw: Add programmatic interface to enable/disable WC
Enable users to enable/disable WC on memory windows programmatically.
Sponsored by: EMC / Isilon Storage Division
|
#
291030 |
|
18-Nov-2015 |
cem |
ntb_hw: Add tunable to disable write-combining
The tunable 'hw.ntb.enable_writecombine' may be set to zero to administratively disable write combining the mapped NTB region.
Sponsored by: EMC / Isilon Storage Division
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#
291029 |
|
18-Nov-2015 |
cem |
NTB: Fix 32-bit BAR size validation
Sponsored by: EMC / Isilon Storage Division
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#
290725 |
|
12-Nov-2015 |
cem |
NTB: MFV 8b782fab: unify translation addresses
There is no need for the upstream and downstream addresses to be different for the NTB configs. Go to using a single set of address. It is still possible to configure them differently using module parameter override however (CEM: tunable).
Authored by: Dave Jiang <dave.jiang@intel.com> Reviewed by: Allen Hubbe <Allen.Hubbe@emc.com> Reviewed by: Jon Mason <jdmason@kudzu.us> Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
290687 |
|
11-Nov-2015 |
cem |
NTB: Add more HW registers to device sysctl tree
Sponsored by: EMC / Isilon Storage Division
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#
290686 |
|
11-Nov-2015 |
cem |
ntb: volatile some members set by interrupt routines
Sponsored by: EMC / Isilon Storage Division
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#
290685 |
|
11-Nov-2015 |
cem |
ntb_hw: Similarly, add a debug-leveled macro for ntb_hw
Sponsored by: EMC / Isilon Storage Division
|
#
290683 |
|
11-Nov-2015 |
cem |
if_ntb: Transport link cleanup needs to be on a taskqueue
Because it can sleep drainking link work callout(s). Linux (dual BSD/GPL driver) does something very similar.
At the same time, switch the NTB CTX lock to a non-spin mutex, because the taskqueue_swi lock can't be taken after a spin mutex.
Suggested by: Witness Sponsored by: EMC / Isilon Storage Division
|
#
290682 |
|
11-Nov-2015 |
cem |
NTB: Diff reduce with Linux
No functional change.
Sponsored by: EMC / Isilon Storage Division
|
#
290681 |
|
11-Nov-2015 |
cem |
ntb_hw: Correctly detect DSD/USD
Sponsored by: EMC / Isilon Storage Division
|
#
290680 |
|
11-Nov-2015 |
cem |
ntb_hw: In INTx fallback, correct db shift from 15 to 16
Sponsored by: EMC / Isilon Storage Division
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#
290679 |
|
11-Nov-2015 |
cem |
ntb: Use caddr_t to simplify pointer arithmetic
Sponsored by: EMC / Isilon Storage Division
|
#
290678 |
|
11-Nov-2015 |
cem |
NTB: Skip db_valid validation writing DB link bit
In ntb_poll_link, we are intentionally writing the link bit, which is absent from db_valid_mask. Don't panic on a kassert when we do so.
The Linux version of this (dual BSD/GPL) driver has the db_valid_mask assertions in callers of db_iowrite() rather than db_iowrite() itself; it skips the assertions in the equivalent of ntb_poll_link(). Rather than duplicating the assertions in every caller, add a db_iowrite_raw() that doesn't check and use it from ntb_poll_link().
Suggested by: kassert_panic Sponsored by: EMC / Isilon Storage Division
|
#
290158 |
|
29-Oct-2015 |
cem |
ntb: Revert r290130 now that r290156 has landed
Nagged by: vangyzen Sponsored by: EMC / Isilon Storage Division
|
#
290130 |
|
29-Oct-2015 |
cem |
ntb: Do not attempt to set write-combining on MWs
AMD64 pmap assumes ranges will be in the DMAP, which isn't necessarily true for NTB memory windows (especially 64-bit BARs).
Suggested by: pmap_change_attr_locked -> kassert_panic Sponsored by: EMC / Isilon Storage Division
|
#
289774 |
|
22-Oct-2015 |
cem |
NTB: Add device introspection sysctl hierarchy
This should export all of the same information as the Linux ntb_hw_intel debugfs info file, but with a bit more structure, in the sysctl tree rooted at 'dev.ntb_hw.<N>.debug_info'.
Raw registers are marked as OPAQUE because reading them on some hardware revisions may cause a hard lockup (NTB errata). They can be read with 'sysctl -x dev.ntb_hw.<N>.debug_info.registers'. On Xeon platforms, some additional registers are available under 'registers.xeon_stats' and 'registers.xeon_hw_err'. They are exported as big-endian values so that the 'sysctl -x' output is legible.
Shrink the feature mask to 32 bits so we can use the %b formatter in 'debug_info.features'.
Sponsored by: EMC / Isilon Storage Division
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#
289654 |
|
20-Oct-2015 |
cem |
NTB: Revert r289645
Per Benno, this is a Linuxism we do not need in FreeBSD.
Suggested by: benno Sponsored by: EMC / Isilon Storage Division
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#
289648 |
|
20-Oct-2015 |
cem |
NTB: MFV 2f887b9a: Rename Intel code names to platform names
Mechanically replace "SOC" with "ATOM" to match Linux. No functional change. Original Linux commit log follows:
Instead of using the platform code names, use the correct platform names to identify the respective Intel NTB hardware.
Authored by: Dave Jiang Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289647 |
|
20-Oct-2015 |
cem |
NTB: Don't abort if setting a MW write-combine fails
Also log BAR mapping results more verbosely.
Sponsored by: EMC / Isilon Storage Division
|
#
289646 |
|
20-Oct-2015 |
cem |
NTB: Fix typo in bar5 tunables
Typo introduced in r289614.
Pointy-hat: cem Sponsored by: EMC / Isilon Storage Division
|
#
289645 |
|
20-Oct-2015 |
cem |
NTB: MFV 7eb38781: Print driver name in module init
Prints driver name to indicate what is being loaded.
Authored by: Dave Jiang Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289617 |
|
20-Oct-2015 |
cem |
NTB: Clean up safely if attach fails early
Sponsored by: EMC / Isilon Storage Division
|
#
289614 |
|
20-Oct-2015 |
cem |
NTB: MFV 42fefc86: Add parameters for Intel SNB B2B addresses
Add module parameters for the addresses to be used in B2B topology.
Authored by: Allen Hubbe Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289612 |
|
20-Oct-2015 |
cem |
NTB: Change Atom (BWD/SoC) pci_id name to match others
Sponsored by: EMC / Isilon Storage Division
|
#
289611 |
|
20-Oct-2015 |
cem |
NTB: MFV 5ae0beb6: Enable link for Intel root port mode in probe
We skip actually bringing up Rootport/Transparent configurations, so most of this doesn't apply. Original Linux commit log:
Link training should be enabled in the driver probe for root port mode. We should not have to wait for transport to be loaded for this to happen. Otherwise the ntb device will not show up on the transparent bridge side of the link.
Authored by: Dave Jiang Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289610 |
|
20-Oct-2015 |
cem |
NTB: enum-ify some HW constants
Sponsored by: EMC / Isilon Storage Division
|
#
289609 |
|
20-Oct-2015 |
cem |
NTB: Pull copy of soc_link_is_err out of recover_soc_link
Sponsored by: EMC / Isilon Storage Division
|
#
289608 |
|
20-Oct-2015 |
cem |
NTB: Drop some dead softc members
Sponsored by: EMC / Isilon Storage Division
|
#
289607 |
|
20-Oct-2015 |
cem |
NTB: Replace last reg_ofs with self_reg
Diff reduce with Linux driver. No functional change.
Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289598 |
|
19-Oct-2015 |
cem |
NTB: Add ntb_db_vector_mask() missed in r289546
This is the last one.
Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289597 |
|
19-Oct-2015 |
cem |
NTB: Add ntb_db_valid_mask() missed in r289546
Another trivial one.
Pointy-hat: cem Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289596 |
|
19-Oct-2015 |
cem |
NTB: Add ntb_mw_clear_trans() missed in r289546
It is just a trivial wrapper around ntb_mw_set_trans().
Authored by: Allen Hubbe Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289546 |
|
18-Oct-2015 |
cem |
if_ntb: MFV e26a5843: Move MW/DB management to if_ntb
This is the last e26a5843 patch. The general thrust of the rewrite was to move more responsibility for Memory Window and Doorbell interrupt management from the ntb_hw driver to if_ntb.
A number of APIs have been added, removed, or replaced. The old DB callback mechanism has been excised. Instead, callers (if_ntb) are responsible for configuring MWs and handling their interrupts more directly.
This adds a tunable, hw.ntb.max_mw_size, allowing users to limit the size of memory windows used by if_ntb (identical to the Linux modparam of the same name).
Despite attempts to keep mechanical name changes to separate commits, some have snuck in here. At least the driver should be much more similar to the latest Linux one now -- making porting fixes easier.
Authored by: Allen Hubbe Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289545 |
|
18-Oct-2015 |
cem |
if_ntb: Rename things to match Linux driver
No functional change. Part of the huge rewrite (e26a5843).
Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289543 |
|
18-Oct-2015 |
cem |
NTB: Flesh out the rest of the xeon_setup_b2b_mw changes
Move all Xeon secondary register setup to the setup_b2b_mw routine. We use subroutines to make it a bit less wordy than the Linux version.
Adds a new tunable, 'hw.ntb.b2b_mw_share'. By default, it is off (zero). If both sides enable it (any non-zero value), the NTB driver attempts to use only half of a memory window for remote register MMIO access.
This is still part of the large Linux rewrite (e26a5843).
Authored by: Allen Hubbe Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289542 |
|
18-Oct-2015 |
cem |
NTB: "Split ntb_hw_intel and ntb_transport drivers"
This Linux commit was more or less a rewrite. Unfortunately, the commit log does not give a lot of context for the rewrite. I have tried to faithfully follow the changes made upstream, including matching function names where possible, while churning the FreeBSD driver as little as possible.
This is the bulk of the rewrite. There are two groups of changes to follow in separate commits: fleshing out the rest of the changes to xeon_setup_b2b_mw(), and some changes to if_ntb.
Yes, this is a big patch (3 files changed, 416 insertions(+), 237 deletions(-)), but the Linux patch was 13 files changed, 2,589 additions(+) and 2,195 deletions(-).
Original Linux commit log: Change ntb_hw_intel to use the new NTB hardware abstraction layer.
Split ntb_transport into its own driver. Change it to use the new NTB hardware abstraction layer.
Authored by: Allen Hubbe Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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#
289541 |
|
18-Oct-2015 |
cem |
NTB: Simplify ntb_map_pci_bars
Skip using a function pointer for shared error logging.
Sponsored by: EMC / Isilon Storage Division
|
#
289540 |
|
18-Oct-2015 |
cem |
NTB: Simplify interrupt handling by merging SoC/Xeon
Some interrupt-related function names changed to match Linux.
No functional change. Still part of the huge e26a5843 rewrite in Linux.
Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289539 |
|
18-Oct-2015 |
cem |
NTB: Rename some variables/functions to match Linux
No functional change.
Still part of the huge e26a5843 rewrite. I'm trying to make it less of a complete rewrite in the FreeBSD version of the driver. Still, it helps if our names match Linux.
Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289538 |
|
18-Oct-2015 |
cem |
NTB: Rename some constants to match Linux
No functional change.
Obtained from: Linux (part of e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289397 |
|
15-Oct-2015 |
cem |
NTB: MFV ab760a0c: Add split BAR support for Haswell
On the Haswell platform, a split BAR option to allow creation of 2 32bit BARs (4 and 5) from the 64bit BAR 4. Adding support for this new option.
Authored by: Dave Jiang Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289396 |
|
15-Oct-2015 |
cem |
NTB: Add variable number MW, DB CB support code
This is a follow-up to r289208: "Xeon Errata Workaround."
Add logic to support a variable number of memory windows and doorbell callbacks. This was added to the Linux driver in the "Xeon Errata Workaround" commit, but I skipped it because it didn't look neccessary at the time. It is needed for future Haswell split-BAR support, so bring it in now.
A new tunable was added for if_ntb, 'hw.ntb.max_num_clients'. By default, it is set to zero -- infer the number of clients from the number of memory windows available from the hardware. Any other positive value can specify a different number of clients, limited by the number of doorbell callbacks available (4 under MSI-X, or 15 (Xeon) or 34 (SoC) under legacy INTx).
Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289348 |
|
14-Oct-2015 |
cem |
NTB: MFV 1db97f25: Pull out platform detection logic
Pull out read of PPD and platform detection logic to new functions, ntb_detect_xeon(), ntb_detect_soc(). No functional change -- mostly this is just shuffling the code to more closely match the Linux driver. Linux commit log:
To simplify some of the platform detection code. Move the platform detection to a function to be called earlier.
Authored by: Dave Jiang Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289347 |
|
15-Oct-2015 |
cem |
NTB: Abstract doorbell register access
The doorbell registers (and associated mask) are 16-bit on Xeon but 64-bit on SoC. Abstract IO access to doorbell registers with 'db_ioread' and 'db_iowrite' (names and idea borrowed from the dual BSD/GPL Linux driver).
Sponsored by: EMC / Isilon Storage Division
|
#
289344 |
|
14-Oct-2015 |
cem |
NTB: Remap MSI-X messages over available slots
Remap MSI-X messages over available slots rather than falling back to legacy INTx when fewer MSI-X slots are available than were requested.
N.B. the Linux driver does *not* do this.
To aid in testing, a tunable 'hw.ntb.force_remap_mode' has been added. It defaults to off (0). When the tunable is enabled and sufficient slots were available, the driver restricts the number of slots by one and remaps the MSI-X messages over the remaining slots.
In case this is actually not okay (as I don't yet have access to this hardware to test), a tunable 'hw.ntb.prefer_intx_to_remap' has been added. It defaults to off (0). When the tunable is enabled and fewer slots are available than requested, fall back to legacy INTx mode rather than attempting to remap MSI-X messages.
Suggested by: jhb Reviewed by: jhb (earlier version) Sponsored by: EMC / Isilon Storage Division
|
#
289343 |
|
14-Oct-2015 |
cem |
NTB: Reserve link event doorbell callback on Xeon
Consumers that registered on this bit would never see a callback and it is likely a mistake.
This does not affect if_ntb, which limits itself to a single doorbell callback.
|
#
289342 |
|
14-Oct-2015 |
cem |
NTB: MFV 53a788a7: Split ntb_setup_interrupts() into SOC, Xeon, and legacy routines
The names don't line up 100% with Linux. Our routines are named ntb_setup_interrupts, ntb_setup_xeon_msix, ntb_setup_soc_msix, and ntb_setup_legacy_interrupt. Linux SNB = FreeBSD Xeon; Linux BWD = FreeBSD SOC. Original Linux commit log:
This is an cleanup effort to make ntb_setup_msix() more readable - use ntb_setup_bwd_msix() to init MSI-Xs on BWD hardware and ntb_setup_snb_msix() - on SNB hardware.
Function ntb_setup_snb_msix() also initializes MSI-Xs the way it should has been done - looping pci_enable_msix() until success or failure.
Authored by: Alexander Gordeev Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289281 |
|
14-Oct-2015 |
cem |
NTB: MFV e8aeb60c: Disable interrupts and poll under high load
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289280 |
|
14-Oct-2015 |
cem |
NTB: MFV 78958433: Enable Snoop on Primary Side
Enable Snoop from Primary to Secondary side on BAR23 and BAR45 on all TLPs. Previously, Snoop was only enabled from Secondary to Primary side. This can have a performance improvement on some workloads.
Also, make the code more obvious about how the link is being enabled.
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289274 |
|
13-Oct-2015 |
cem |
NTB: MFV 58b88920: Document HW errata
Add a comment describing the necessary ordering of modifications to the NTB Limit and Base registers.
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289272 |
|
13-Oct-2015 |
cem |
NTB: MFV 9fec60c4: Fix NTB-RP Link Up
The Xeon NTB-RP setup, the transparent side does not get a link up/down interrupt. Since the presence of a NTB device on the transparent side means that we have a NTB link up, we can work around the lack of an interrupt by simply calling the link up function to notify the upper layers.
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289271 |
|
13-Oct-2015 |
cem |
NTB: MFV c529aa30: Xeon Doorbell errata workaround
Modifications to the 14th bit of the B2BDOORBELL register will not be mirrored to the remote system due to a hardware issue. To get around the issue, shrink the number of available doorbell bits by 1. The max number of doorbells was being used as a way to referencing the Link Doorbell bit. Since this would no longer work, the driver must now explicitly reference that bit.
This does not affect the xeon_errata_workaround case, as it is not using the b2bdoorbell register.
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
|
#
289266 |
|
13-Oct-2015 |
cem |
NTB: MFV f9a2cf89: Comment Fix
Add "data" ntb_register_db_callback parameter description comment and correct poor speling.
Authored by: Jon Mason Obtained from: Linux (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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289265 |
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13-Oct-2015 |
cem |
NTB: MFV b1ef0043: Remove References of non-B2B BWD HW
NTB-RP is not a supported configuration on BWD hardware. Remove the code attempting to set it up.
Authored by: Jon Mason Obtained from: Linux (dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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289257 |
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13-Oct-2015 |
cem |
NTB: (partial) MFV ed6c24ed: NTB-RP support
This commit does not actually add NTB-RP support. Mostly it serves to shuffle code around to match the Linux driver. Original Linux commit log follows:
Add support for Non-Transparent Bridge connected to a PCI-E Root Port on the remote system (also known as NTB-RP mode). This allows for a NTB enabled system to be connected to a non-NTB enabled system/slot.
Modifications to the registers and BARs/MWs on the Secondary side by the remote system are reflected into registers on the Primary side for the local system. Similarly, modifications of registers and BARs/MWs on Primary side by the local system are reflected into registers on the Secondary side for the Remote System. This allows communication between the 2 sides via these registers and BARs/MWs.
Note: there is not a fix for the Xeon Errata (that was already worked around in NTB-B2B mode) for NTB-RP mode. Due to this limitation, NTB-RP will not work on the Secondary side with the Xeon Errata workaround enabled. To get around this, disable the workaround via the xeon_errata_workaround=0 modparm. However, this can cause the hang described in the errata.
Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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289255 |
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13-Oct-2015 |
cem |
NTB: MFV 49793889: Rename Variables for NTB-RP
Many variable names in the NTB driver refer to the primary or secondary side. However, these variables will be used to access the reverse case when in NTB-RP mode. Make these names more generic in anticipation of NTB-RP support.
Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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289234 |
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13-Oct-2015 |
cem |
NTB: Enable 32-bit support
Sponsored by: EMC / Isilon Storage Division
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289233 |
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13-Oct-2015 |
cem |
NTB: Update pci ids
Add JSF, HSX, BDX ids; add two additional Xeon errata flags while we're here.
Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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289232 |
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13-Oct-2015 |
cem |
NTB: MFV 113bf1c9: BWD Link Recovery
The BWD NTB device will drop the link if an error is encountered on the point-to-point PCI bridge. The link will stay down until all errors are cleared and the link is re-established. On link down, check to see if the error is detected, if so do the necessary housekeeping to try and recover from the error and reestablish the link.
There is a potential race between the 2 NTB devices recovering at the same time. If the times are synchronized, the link will not recover and the driver will be stuck in this loop forever. Add a random interval to the recovery time to prevent this race.
Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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289209 |
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13-Oct-2015 |
cem |
NTB: Style(9) cleanups
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289208 |
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13-Oct-2015 |
cem |
NTB: MFV 948d3a65: Xeon Errata Workaround
There is a Xeon hardware errata related to writes to SDOORBELL or B2BDOORBELL in conjunction with inbound access to NTB MMIO Space, which may hang the system. To workaround this issue, use one of the memory windows to access the interrupt and scratch pad registers on the remote system. This bypasses the issue, but removes one of the memory windows from use by the transport. This reduction of MWs necessitates adding some logic to determine the number of available MWs.
Since some NTB usage methodologies may have unidirectional traffic, the ability to disable the workaround via modparm has been added.
See BF113 in http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-c5500-c3500-spec-update.pdf See BT119 in http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-e5-family-spec-update.pdf
Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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289207 |
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13-Oct-2015 |
cem |
NTB: Add hw.ntb sysctl node
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289206 |
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13-Oct-2015 |
cem |
NTB: MFV b6750cfe: Correct USD/DSD Identification
Due to ambiguous documentation, the USD/DSD identification is backward when compared to the setting in BIOS. Correct the bits to match the BIOS setting.
Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division
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283291 |
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22-May-2015 |
jkim |
CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten years for head. However, it is continuously misused as the mpsafe argument for callout_init(9). Deprecate the flag and clean up callout_init() calls to make them more consistent.
Differential Revision: https://reviews.freebsd.org/D2613 Reviewed by: jhb MFC after: 2 weeks
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255281 |
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05-Sep-2013 |
carl |
Remove contractions.
Approved by: jimharris Sponsored by: Intel
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255279 |
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05-Sep-2013 |
carl |
Workaround an issue with hardware by accessing remote device through mem window.
Approved by: jimharris Sponsored by: Intel
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255278 |
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05-Sep-2013 |
carl |
Simplify register access macros by removing one level of indirection.
Approved by: jimharris Sponsored by: Intel
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255276 |
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05-Sep-2013 |
carl |
Implement workaround for IvyTown 4K BAR size issue.
Approved by: jimharris Sponsored by: Intel
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255275 |
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05-Sep-2013 |
carl |
Simplifying bus alloc resource call since we only need the default values.
Approved by: jimharris Sponsored by: Intel
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255274 |
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05-Sep-2013 |
carl |
Add support for per device features and workarounds.
Approved by: jimharris Sponsored by: Intel
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255272 |
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05-Sep-2013 |
carl |
Restructure the PCI bar initialization code in anticipation of upcoming bug fixes.
Approved by: jimharris Sponsored by: Intel
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255269 |
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05-Sep-2013 |
carl |
Throw a bit to enable the link to come up on Xeon.
Approved by: jimharris Sponsored by: Intel
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255268 |
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05-Sep-2013 |
carl |
Add some logging to ntb link up.
Approved by: jimharris Sponsored by: Intel
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250079 |
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29-Apr-2013 |
carl |
Add a new driver to support the Intel Non-Transparent Bridge(NTB).
The NTB allows you to connect two systems with this device using a PCI-e link. The driver is made of two modules: - ntb_hw which is a basic hardware abstraction layer for the device. - if_ntb which implements the ntb network device and the communication protocol.
The driver is limited at the moment to CPU memcpy instead of using DMA, and only Back-to-Back mode is supported. Also the network device isn't full featured yet. These changes will be coming soon. The DMA change will also bring in the ioat driver from the project branch it is on now.
This is an initial port of the GPL/BSD Linux driver contributed by Jon Mason from Intel. Any bugs are my contributions.
Sponsored by: Intel Reviewed by: jimharris, joel (man page only) Approved by: jimharris (mentor)
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