Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE
cycle.

Prune svn:mergeinfo from the new branch, and rename it to RC1.

Update __FreeBSD_version.

Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and
the dvd1.iso packages population.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, as nothing has been merged
here.

Additional commits post-branch will follow.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Refactor DTS files for Zynq-based SoCs

- Factor out common part to zynq-7000.dtsi
- Fix problem with Zynq interrupts by using interrupt "triples"
in .dtsi file to differentiate between edge-triggered and
level-triggered interrupts
- cgem driver now recognizes "status" property

Submitted by: Thomas Skibo <thomasskibo@yahoo.com>
Differential Revision: https://reviews.freebsd.org/D6095

Fix the Zedboard/Zynq ethernet driver to handle media speed changes so
that it can connect to switches at speeds other than 1gb.

This requires changing the reference clock speed. Since we still don't
have a general clock API that lets a SoC-independant driver manipulate its
own clocks, this change includes a weak reference to a routine named
cgem_set_ref_clk(). The default implementation is a no-op; SoC-specific
code can provide an implementation that actually changes the speed.

Submitted by: Thomas Skibo <ThomasSkibo@sbcglobal.net>

Honor the max-frequency property if it appears in the fdt data.
Adjust the exynos and zedboard dts files to use max-frequency (the
documented standard property) instead of clock-frequency.

Submitted by: Thomas Skibo <ThomasSkibo@sbcglobal.net>

Integrate device-tree upstream files into the build process:
(1) Invoke cpp to bring in files via #include (although the old
/include/ stuff is supported still).
(2) bring in files from either vendor tree or freebsd-custom files
when building.
(3) move all dts* files from sys/boot/fdt/dts to
sys/boot/fdt/dts/${MACHINE} as appropriate.
(4) encode all the magic to do the build in sys/tools/fdt/make_dtb.sh
so that the different places in the tree use the exact same logic.
(5) switch back to gpl dtc by default. the bsdl one in the tree has
significant issues not easily addressed by those unfamiliar with
the code.

Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.

Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net>
Reviewed by: wkoszek, freebsd-arm@ (no objections raised)