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303975 |
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11-Aug-2016 |
gjb |
Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, and rename it to RC1.
Update __FreeBSD_version.
Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and the dvd1.iso packages population.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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302408 |
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08-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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289602 |
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19-Oct-2015 |
ian |
Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits, which worked fine for the first few SoCs we supported. Now that we support most of the cortex-a series processors, it's important to get the right bits set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
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279811 |
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09-Mar-2015 |
ian |
Add minimum cache line sizes to struct cpuinfo, use them in the new cache maintenance routines. Also add a routine to invalidate the branch cache.
Submitted by: Michal Meloun
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276333 |
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28-Dec-2014 |
ian |
Add new code to read and parse cpu identification data using the new CPUID mechanism defined for armv7 (and also present on some armv6 chips including the arm1176 used on rpi). The information is parsed into a global cpuinfo structure, which will be used by (upcoming) new cache and tlb maintenance code to handle cpu-specific variations of the maintence sequences.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz
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