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303975 |
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11-Aug-2016 |
gjb |
Copy stable/11@r303970 to releng/11.0 as part of the 11.0-RELEASE cycle.
Prune svn:mergeinfo from the new branch, and rename it to RC1.
Update __FreeBSD_version.
Use the quarterly branch for the default FreeBSD.conf pkg(8) repo and the dvd1.iso packages population.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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302408 |
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08-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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282517 |
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06-May-2015 |
ganbold |
This patch adds support for the extended baud rate register available on the aml8726-m6 (and later) SoC which allows for lower speeds.
Differential Revision: https://reviews.freebsd.org/D2433 Submitted by: John Wehle
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281438 |
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11-Apr-2015 |
andrew |
Add support for the uart classes to set their default register shift value. This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2.
This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op.
MFC after: 1 week
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281418 |
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11-Apr-2015 |
ganbold |
This modifies several FreeBSD drivers to use the GNU approach to supply clk81 information. It also changes the hardware strings in some of the drivers to match what's present in the GNU files.
Submitted by: John Wehle Reviewed by: imp
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280905 |
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31-Mar-2015 |
ganbold |
Add necessary changes to support various Amlogic SoC devices specially aml8726-m6 and aml8726-m8b SoC based devices. aml8726-m6 SoC exist in devices such as Visson ATV-102. Hardkernel ODROID-C1 board has aml8726-m8b SoC.
The following support is included: Basic machdep code SMP Interrupt controller Clock control driver (aka gate) Pinctrl Timer Real time clock UART GPIO I2C SD controller SDXC controller USB Watchdog Random number generator PLL / Clock frequency measurement Frame buffer
Submitted by: John Wehle Approved by: stas (mentor)
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