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294883 |
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27-Jan-2016 |
jhibbits |
Convert rman to use rman_res_t instead of u_long
Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long.
This is step one in migrating rman to use uintmax_t for resources instead of u_long.
Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API.
This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI.
Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
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287882 |
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16-Sep-2015 |
zbb |
Add domain support to PCI bus allocation
When the system has more than a single PCI domain, the bus numbers are not unique, thus they cannot be used for "pci" device numbering. Change bus numbers to -1 (i.e. to-be-determined automatically) wherever the code did not care about domains.
Reviewed by: jhb Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3406
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285121 |
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04-Jul-2015 |
adrian |
Reshuffle all of the DDR flush operations into a single switch/mux, and start teaching subsystems about it.
The Atheros MIPS platforms don't guarantee any kind of FIFO consistency with interrupts in hardware. So software needs to do a flush when it receives an interrupt and before it calls the interrupt handler.
There are new ones for the QCA934x and QCA955x, so do a few things:
* Get rid of the individual ones (for ethernet and IP2); * Create a mux and enum listing all the variations on DDR flushes; * replace the uses of IP2 with the relevant one (which will typically be "PCI" here); * call the USB DDR flush before calling the real USB interrupt handlers; * call the ethernet one upon receiving an interrupt that's for us, rather than never calling it during operation.
Tested:
* QCA9558 (TP-Link archer c7 v2) * AR9331 (Carambola 2)
TODO:
* PCI, USB, ethernet, etc need to do a double-check to see if the interrupt was truely for them before doing the DDR. For now I prefer "correct" over "fast".
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283095 |
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19-May-2015 |
adrian |
Add initial support for the QCA955x PCIe host controller.
The QCA955x looks a lot like the AR724x PCIe controller, except it supports two root complexes. Unfortunately I only have one, so although this code has started down the path of supporting more than one, it's definitely not yet ready.
Tested:
* AP135 board (QCA9558 SoC), with the 11ac NIC swapped for an AR9380 PCIe NIC.
Notes:
* Yes, this driver isn't very pretty. I decided to commit what I have versus holding onto something that isn't yet finished. It is enough to bring up the above NIC and interrupt routing works, so it's a good start.
* However, yes, the DDR flush routine hooks need to be fixed up. I don't think I'm firing the right one at the moment.
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