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292750 |
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26-Dec-2015 |
adrian |
[mdio] Add MDIO support for "extended" registers as defined by IEEE 802.3 Clause 45.
IEEE 802.3 Clause 45 added backwards-compatible support for 2^16 PHY registers
through the addition of an additional device address frame.
Clause 45 addressing is used in 10Gbe PHYs, 802.3az EEE registers, etc. It may
make sense to provide a similar extension to the miibus interface, but I've
refrained from unilaterally doing so here.
Submitted by: Landon Fuller <landon@landonf.org>
Differential Revision: https://reviews.freebsd.org/D4607
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| #
234861 |
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01-May-2012 |
adrian |
Bring over the first part of the etherswitch framework - an MDIO bus and
MDIO/MII rendezvous proxy.
* Add an 'mdio' bus, which is the "IO" side of an MII bus (but by design
can be anything which implements the underlying register access API.)
* Add 'miiproxy' and 'mdioproxy', which provides a rendezvous mechanism
for MII busses to appear hanging off arbitrary busses (ie, that aren't
necessarily a traditional looking MII bus.)
MII busses can now hang off anything that implements an mdiobus.
For the AR71xx SoC, there's one MDIO bus but two MII busses. So to
properly support two or more real PHYs, this can be done:
# arge0 MDIO bus - there's no arge1 MDIO bus for AR71xx
hint.argemdio.0.at="nexus0"
hint.argemdio.0.maddr=0x19000000
hint.argemdio.0.msize=0x1000
hint.argemdio.0.order=0
# Create two mdioproxy instances
hint.mdioproxy.0.at="mdio0"
hint.mdioproxy.1.at="mdio0"
# .. and with a follow-up patch
hint.arge.0.mdio=mdioproxy0
hint.arge.1.mdio=mdioproxy0
TODO:
* Do a sweep or two and add appropriate locking in mdio/mdioproxy/miiproxy.
Submitted by: Stefan Bethke <stb@lassitu.de>
Reviewed by: ray
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