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331722 |
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29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes.
Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes.
Requested by: gjb (re)
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283291 |
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22-May-2015 |
jkim |
CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten years for head. However, it is continuously misused as the mpsafe argument for callout_init(9). Deprecate the flag and clean up callout_init() calls to make them more consistent.
Differential Revision: https://reviews.freebsd.org/D2613 Reviewed by: jhb MFC after: 2 weeks
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274821 |
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21-Nov-2014 |
brooks |
Merge from CheriBSD:
commit d0c7d235c09fc65dbdb278e7016a96f79c6a49cc Make the Altera JTAG UART device driver slightly more forgiving of the foibles of a sub-par hrdware interface by increasing the timeout for spotting JTAG polling from one to two seconds.
commit 19ed45a18832560dab967c179d83b71081c3a220 Update comment.
commit 8edfe803f033cc8e33229f99894c2b7496a44d5f Add a comment about a device-driver race condition that could cause the BERI pipeline to wedge awaiting JTAG in the event that both the low-level console and the tty layer decide to write to the JTAG FIFO just before JTAG is disconnected. Resolving this race is a bit tricky as it looks like there isn't a way to 'give the character back' to the tty layer when we discover the race. The easy fix is to drop the character, which we don't yet do, but perhaps should as that is a better outcome than wedging the pipeline.
commit 2ea26cf579c9defcf31e413e7c9b0fbc159237fc Add a comment about an inherent race with hardware in the Altera JTAG UART's low-level console code.
Submitted by: rwatson MFC after: 1 week Sponsored by: DARPA, AFRL
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239676 |
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25-Aug-2012 |
rwatson |
Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core, which presents a UART-like interface over the Avalon bus that can be addressed over JTAG. This IP core proves extremely useful, allowing us to connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard and soft cores. As interrupts are optionally configured for this soft core, we support both interrupt-driven and polled modes of operation, which must be selected using device.hints. UART instances appear in /dev as ttyu0, ttyu1, etc.
However, it also contains a number of quirks, which make it difficult to tell when JTAG is connected, and some buffering issues. We work around these as best we can, using various heuristics.
While the majority of this device driver is not only not BERI-specific, but also not MIPS-specific, for now add its defines in the BERI files list, as the console-level parts are aware of where the first JTAG UART is mapped on Avalon, and contain MIPS-specific address translation, to use before Newbus and device.hints are available.
Sponsored by: DARPA, AFRL
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