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291492 |
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30-Nov-2015 |
mmel |
ARM: create new memory attribute for writethrough cacheable memory. - add new TEX class for WT cacheable memory - export new TEX class to kernel as VM_MEMATTR_WT attribute - add new aliases VM_MEMATTR_WRITE_COMBINING and VM_MEMATTR_WRITE_BACK, it's used in DRM code
Note: Only Cortex A8 supports WT caching in HW. On rest of Cortex CPUs, WT requests is treated as uncacheable.
Approved by: kib (mentor)
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280712 |
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26-Mar-2015 |
ian |
New pmap code for armv6. Disabled by default, option ARM_NEW_PMAP enables it.
This is pretty much a complete rewrite based on the existing i386 code. The patches have been circulating for a couple years and have been looked at by plenty of people, but I'm not putting anybody on the hook as having reviewed this in any formal sense except myself.
After this has gotten wider testing from the user community, ARM_NEW_PMAP will become the default and various dregs of the old pmap code will be removed.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>, Michal Meloun <meloun@miracle.cz>
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