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340270 |
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08-Nov-2018 |
jhb |
MFC 340164,340168,340170: Add custom cpu_lock_delay() for x86.
340164: Add a KPI for the delay while spinning on a spin lock.
Replace a call to DELAY(1) with a new cpu_lock_delay() KPI. Currently cpu_lock_delay() is defined to DELAY(1) on all platforms. However, platforms with a DELAY() implementation that uses spin locks should implement a custom cpu_lock_delay() doesn't use locks.
340168: Add a delay_tsc() static function for when DELAY() uses the TSC.
This uses slightly simpler logic than the existing code by using the full 64-bit counter and thus not having to worry about counter overflow.
340170: Add a custom implementation of cpu_lock_delay() for x86.
Avoid using DELAY() since it can try to use spin locks on CPUs without a P-state invariant TSC. For cpu_lock_delay(), always use the TSC if it exists (even if it is not P-state invariant) to delay for a microsecond. If the TSC does not exist, read from I/O port 0x84 to delay instead.
PR: 228768
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302408 |
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07-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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300694 |
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25-May-2016 |
ian |
Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't have ACLE support built in. The ACLE (ARM C Language Extensions) defines a set of standardized symbols which indicate the architecture version and features available. ACLE support is built in to modern compilers (both clang and gcc), but absent from gcc prior to 4.4.
ARM (the company) provides the acle-compat.h header file to define the right symbols for older versions of gcc. Basically, acle-compat.h does for arm about the same thing cdefs.h does for freebsd: defines standardized macros that work no matter which compiler you use. If ARM hadn't provided this file we would have ended up with a big #ifdef __arm__ section in cdefs.h with our own compatibility shims.
Remove #include <machine/acle-compat.h> from the zillion other places (an ever-growing list) that it appears. Since style(9) requires sys/types.h or sys/param.h early in the include list, and both of those lead to including cdefs.h, only a couple special cases still need to include acle-compat.h directly.
Loves it: imp
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295315 |
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05-Feb-2016 |
mmel |
ARM: Introduce new cpu-v4.h header and move all ARMv4 specific code from cpu-v6.h to it. Remove unneeded cpu-v6.h includes.
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290614 |
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09-Nov-2015 |
bz |
Now that the PMU implementation is independent of HWPMC as of r288992 use it to manage the CCNT.
Use the CNNT for get_cyclecount() instead of binuptime() when device pmu is compiled in; if it fails to attach, fall back to the former method.
Enable by default for the BeagleBoneBlack configuration.
Optained from: Cambridge/L41 Sponsored by: DARPA/AFRL Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D3837
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276808 |
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08-Jan-2015 |
ian |
Move the inclusion of cpu-v6.h inside the #ifdef _KERNEL block, so that userland programs (which probably don't actually need machine/cpu.h) compile.
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276803 |
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07-Jan-2015 |
ian |
Add accessors for the ARM CP15 performance monitor registers. Also ensure that some #ifdef SMP code is also conditional on __ARM_ARCH >= 7; we don't support SMP on armv6, but some drivers and modules are compiled with it forced on via the compiler command line.
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267597 |
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17-Jun-2014 |
tuexen |
Different versions of the ARM processor use different registers. Fix the code used on a Raspberry Pi.
Reviewed by: markm@
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266083 |
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14-May-2014 |
markm |
Give suitably-endowed ARMs a register similar to the x86 TSC register.
Here, "suitably endowed" means that the System Control Coprocessor (#15) has Performance Monitoring Registers, including a CCNT (Cycle Count) register.
The CCNT register is used in a way similar to the TSC register in x86 processors by the get_cyclecount(9) function. The entropy-harvesting thread is a heavy user of this function, and will benefit from not having to call binuptime(9) instead.
One problem with the CCNT register is that it is 32-bit only, so the upper 32-bits of the returned number are always 0. The entropy harvester does not care, but in case any one else does, follow-up work may include an interrup trap to increment an upper-32-bit counter on CCNT overflow.
Another problem is that the CCNT register is not readable in user-mode code; in can be made readable by userland, but then it is also writable, and so is a good chunk of the PMU system. For that reason, the CCNT is not enabled for user-mode access in this commit.
Like the x86, there is one CCNT per core, so they don't all run in perfect sync.
Reviewed by: ian@ (an earlier version) Tested by: ian@ (same earlier version) Committed from: WANDBOARD-QUAD
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261663 |
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09-Feb-2014 |
andrew |
Pass the pagetable used from locore.S to initarm to allow it to map data in as required.
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261562 |
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06-Feb-2014 |
andrew |
Pass the kernel physical address to initarm through the boot param struct.
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257200 |
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26-Oct-2013 |
ian |
Remove #include <machine/frame.h> from all the arm code that doesn't really need it. That would be almost everywhere it was included. Add it in a couple files that really do need it and were previously getting it by accident via another header.
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253750 |
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28-Jul-2013 |
avg |
Revert r253748,253749
This WIP should not have been committed yet.
Pointyhat to: avg
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253748 |
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28-Jul-2013 |
avg |
put contents of cpu.h under _KERNEL
no userland-serviceable parts inside
MFC after: 20 days
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236524 |
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03-Jun-2012 |
imp |
Minor rearrangement of the locore <-> initarm interface. Pass in a structure with the first 4 registers to allow a wider range of boot loaders to work. Future commits will make use of this to centralize support for the different loaders.
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219653 |
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14-Mar-2011 |
jkim |
Make get_cyclecount(9) little bit more useful where binuptime(9) is used.
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158445 |
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11-May-2006 |
phk |
Clean out sysctl machdep.* related defines.
The cmos clock related stuff should really be in MI code.
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153666 |
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22-Dec-2005 |
jhb |
Tweak how the MD code calls the fooclock() methods some. Instead of passing a pointer to an opaque clockframe structure and requiring the MD code to supply CLKF_FOO() macros to extract needed values out of the opaque structure, just pass the needed values directly. In practice this means passing the pair (usermode, pc) to hardclock() and profclock() and passing the boolean (usermode) to hardclock_cpu() and hardclock_process(). Other details: - Axe clockframe and CLKF_FOO() macros on all architectures. Basically, all the archs were taking a trapframe and converting it into a clockframe one way or another. Now they can just extract the PC and usermode values directly out of the trapframe and pass it to fooclock(). - Renamed hardclock_process() to hardclock_cpu() as the latter is more accurate. - On Alpha, we now run profclock() at hz (profhz == hz) rather than at the slower stathz. - On Alpha, for the TurboLaser machines that don't have an 8254 timecounter, call hardclock() directly. This removes an extra conditional check from every clock interrupt on Alpha on the BSP. There is probably room for even further pruning here by changing Alpha to use the simplified timecounter we use on x86 with the lapic timer since we don't get interrupts from the 8254 on Alpha anyway. - On x86, clkintr() shouldn't ever be called now unless using_lapic_timer is false, so add a KASSERT() to that affect and remove a condition to slightly optimize the non-lapic case. - Change prototypeof arm_handler_execute() so that it's first arg is a trapframe pointer rather than a void pointer for clarity. - Use KCOUNT macro in profclock() to lookup the kernel profiling bucket.
Tested on: alpha, amd64, arm, i386, ia64, sparc64 Reviewed by: bde (mostly)
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141094 |
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01-Feb-2005 |
njl |
Sort functions.
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137223 |
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04-Nov-2004 |
cognet |
Implement get_cyclecount().
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133084 |
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03-Aug-2004 |
mux |
Instead of calling ia32_pause() conditionally on __i386__ or __amd64__ being defined, define and use a new MD macro, cpu_spinwait(). It only expands to something on i386 and amd64, so the compiled code should be identical.
Name of the macro found by: jhb Reviewed by: jhb
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129198 |
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14-May-2004 |
cognet |
Import FreeBSD/arm kernel bits. It only supports sa1110 (on simics) right now, but xscale support should come soon. Some of the initial work has been provided by : Stephane Potvin <sepotvin at videotron.ca> Most of this comes from NetBSD.
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