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331722 |
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29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes.
Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes.
Requested by: gjb (re)
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327594 |
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05-Jan-2018 |
ian |
MFC r324169:
Work around bcm283x silicon bugs to make i2c repeat-start work for the most common case where it's needed -- a write followed by a read to the same slave.
The i2c controller in this chip only performs complete transfers, it does not provide control over start/repeat-start/stop operations on the bus. Thus, we have gotten a full stop/start sequence rather than a repeat-start when doing a typical i2c slave access of "write address, read data". Some i2c slave devices require a repeat-start to work correctly.
These changes cause the controller to do a repeat-start by pre-staging the read parameters in the controller registers immediate after the controller has latched the values for the initial write operation, but before any bytes are actually written. With the values pre-staged, when the write portion of the transfer completes, the state machine in the silicon sees a new start operation already staged and that causes it to perform a repeat-start. The key to tricking the buggy hardware into doing this is to avoid prefilling any output data in the transmit FIFO so that it is possible to catch the silicon in the state where transmit values are latched but the transmit isn't completed yet.
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