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308433 |
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07-Nov-2016 |
jhb |
MFC 305836: Remove 'cpu' and 'cpu_class' on amd64.
The 'cpu' and 'cpu_class' variables were always set to the same value on amd64 and are legacy holdovers from i386. Remove them entirely on amd64.
Requested by: kib (MFC)
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302408 |
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07-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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292668 |
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23-Dec-2015 |
jhb |
Move shared variables from {amd64,i386}/initcpu.c to x86/identcpu.c. While here, move the common bits of <machine/cputypes.h> to <x86/cputypes.h> as well.
Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D4670
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186797 |
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05-Jan-2009 |
jkim |
Add Centaur/IDT/VIA vendor ID for Nano family, which has long mode support.
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185341 |
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26-Nov-2008 |
jkim |
Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").
Reviewed by: jhb, peter (early amd64 version)
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139731 |
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05-Jan-2005 |
imp |
Begin all license/copyright comments with /*-
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130032 |
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03-Jun-2004 |
peter |
MFi386: move cpu_nameclass struct next to its only consumer
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114349 |
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30-Apr-2003 |
peter |
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
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101235 |
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02-Aug-2002 |
phk |
Move a prototype to the least wrong place.
Suggested by: bde
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100321 |
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18-Jul-2002 |
phk |
Add initialization code for the AMD Elan sc520 which maps the MMCR into KVM and sets the i8254 frequency to the correct value.
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66441 |
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29-Sep-2000 |
peter |
First shot at identifying the Pentum 4 acording to our reading of the the cpu_id extensions in the Intel docs. There is more info available. See the following URL for more details. http://developer.intel.com/design/processor/future/manuals/CPUID_Supplement.htm
Requested by: Intel
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50477 |
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27-Aug-1999 |
peter |
$Id$ -> $FreeBSD$
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43612 |
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04-Feb-1999 |
kato |
Recognize Pentium II Xeon, Celeron and Pentium III cpus. Because CPU names are printed on their packages and shown by BIOS, kernel does not need to show details.
PR: 8751, 9320 and 9463
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36290 |
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21-May-1998 |
des |
Add CPU_PII to the list.
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30805 |
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28-Oct-1997 |
bde |
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
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25159 |
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26-Apr-1997 |
kato |
Add new cpu type, CPU_CY486DX, which shows Cyrix 486S/DX series CPUs, and initialization routine for those CPUs.
Tested by: Bob Bishop <rb@gid.co.uk>
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24112 |
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22-Mar-1997 |
kato |
Improved CPU identification and initialization routines. This supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of IBM Blue Lightning CPU.
If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in write-through mode. This can be disabled by kernel configuration options.
Reviewed by: Bruce Evans <bde@freebsd.org> and Jordan K. Hubbard <jkh@freebsd.org>
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22975 |
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22-Feb-1997 |
peter |
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not ready for it yet.
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21673 |
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14-Jan-1997 |
jkh |
Make the long-awaited change from $Id$ to $FreeBSD$
This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
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13765 |
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30-Jan-1996 |
mpp |
Fix a bunch of spelling errors in the comment fields of a bunch of system include files.
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13000 |
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24-Dec-1995 |
dg |
Add Pentium Pro CPU detection and special handling. For now, all the optimizations we have for 586s also apply to 686s...this will be fine- tuned in the future as appropriate.
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2495 |
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04-Sep-1994 |
pst |
Detect if we're running on a Cyrix 486DLC and enable automatic cache negation whenever we access memory between 640k and 1M.
Original code from NetBSD 1.0-BETA. The exact origins are unclear but Theo de Raadt, Charles, and Michael V. may have contributed to it.
Submitted by: pst
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719 |
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07-Nov-1993 |
wollman |
Made all header files idempotent and moved incorrect common data from headers into a related source file. Added cons.h as first step towards moving i386/i386/cons.h to machine/cons.h where it belongs.
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553 |
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08-Oct-1993 |
rgrimes |
Define the types of cpu's there are, from NetBSD
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