#
296373 |
|
04-Mar-2016 |
marius |
- Copy stable/10@296371 to releng/10.3 in preparation for 10.3-RC1 builds. - Update newvers.sh to reflect RC1. - Update __FreeBSD_version to reflect 10.3. - Update default pkg(8) configuration to use the quarterly branch.
Approved by: re (implicit) |
#
266001 |
|
14-May-2014 |
ian |
MFC r258002, r258024, r258027, r258051, r258052, r258243, r258244, r258002, r258024, r258027, r258051, r258052, r258243,
Follow up r223485, which made AIM use the ABI thread pointer instead of PCPU fields for curthread, by doing the same to Book-E.
Use the same implementation of copyinout.c for both AIM and Book-E.
Actually add IOMMU domain to the list of known mappings.
Following the approach with ACPI DMAR on x86, split IOMMU handling into a variant PCI bus instead of trying to shoehorn it into the PCI host bridge adapter.
Make sure that TLB1 mappings are aligned correctly.
|
#
258002 |
|
11-Nov-2013 |
nwhitehorn |
Follow up r223485, which made AIM use the ABI thread pointer instead of PCPU fields for curthread, by doing the same to Book-E. This closes some potential races switching between CPUs. As a side effect, it turns out the AIM and Book-E swtch.S implementations were the same to within a few registers, so move that to powerpc/powerpc.
MFC after: 3 months
|
#
235013 |
|
04-May-2012 |
nwhitehorn |
Fix final bugs in memory barriers on PowerPC: - Use isync/lwsync unconditionally for acquire/release. Use of isync guarantees a complete memory barrier, which is important for serialization of bus space accesses with mutexes on multi-processor systems. - Go back to using sync as the I/O memory barrier, which solves the same problem as above with respect to mutex release using lwsync, while not penalizing non-I/O operations like a return to sync on the atomic release operations would. - Place an acquisition barrier around thread lock acquisition in cpu_switchin().
|
#
234517 |
|
20-Apr-2012 |
nwhitehorn |
Make sure all pending operations have completed on the existing thread before (potentially) migrating it to a different CPU.
MFC after: 5 days
|
#
231019 |
|
05-Feb-2012 |
andreast |
Revert the _NOPROF entries on cpu_throw, cpu_switch and savectx. They can be profiled too now.
MFC after: 2 weeks
|
#
230400 |
|
20-Jan-2012 |
andreast |
This commit adds profiling support for powerpc64. Now we can do application profiling and kernel profiling. To enable kernel profiling one has to build kgmon(8). I will enable the build once I managed to build and test powerpc (32-bit) kernels with profiling support.
- add a powerpc64 PROF_PROLOGUE for _mcount. - add macros to avoid adding the PROF_PROLOGUE in certain assembly entries. - apply these macros where needed. - add size information to the MCOUNT function.
MFC after: 3 weeks, together with r230291
|
#
223485 |
|
23-Jun-2011 |
nwhitehorn |
Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64) instead of a PCPU field for curthread. This averts a race on SMP systems with a high interrupt rate where the thread looking up the value of curthread could be preempted and migrated between obtaining the PCPU pointer and reading the value of pc_curthread, resulting in curthread being observed to be the current thread on the thread's original CPU. This played merry havoc with the system, in particular with mutexes. Many thanks to jhb for helping me work this one out.
Note that Book-E is in principle susceptible to the same problem, but has not been modified yet due to lack of Book-E hardware.
MFC after: 2 weeks
|
#
218824 |
|
18-Feb-2011 |
nwhitehorn |
Turn off default generation of userland dot symbols on powerpc64 now that we have a binutils that supports it. Kernel dot symbols remain on to assist DDB.
|
#
214739 |
|
03-Nov-2010 |
nwhitehorn |
Clean up the user segment handling code a little more. Now that set_user_sr() itself caches the user segment VSID, there is no need for cpu_switch() to do it again. This change also unifies the 32 and 64-bit code paths for kernel faults on user pages and remaps the user SLB slot on 64-bit systems when taking a syscall to avoid some unnecessary segment exception traps.
|
#
214607 |
|
31-Oct-2010 |
nwhitehorn |
Next-to-leading-order perturbation of synchronization operations for switching the user segment register. All races should now be closed and a minimum of pipelines flushes be required to close them.
|
#
214574 |
|
30-Oct-2010 |
nwhitehorn |
Restructure the way the copyin/copyout segment is stored to prevent a concurrency bug. Since all SLB/SR entries were invalidated during an exception, a decrementer exception could cause the user segment to be invalidated during a copyin()/copyout() without a thread switch that would cause it to be restored from the PCB, potentially causing the operation to continue on invalid memory. This is now handled by explicit restoration of segment 12 from the PCB on 32-bit systems and a check in the Data Segment Exception handler on 64-bit.
While here, cause copyin()/copyout() to check whether the requested user segment is already installed, saving some pipeline flushes, and fix the synchronization primitives around the mtsr and slbmte instructions to prevent accessing stale segments.
MFC after: 2 weeks
|
#
209975 |
|
13-Jul-2010 |
nwhitehorn |
MFppc64:
Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
|
#
198731 |
|
31-Oct-2009 |
nwhitehorn |
Unbreak cpu_switch(). The register allocator in my brain is clearly broken. Also, Altivec context switching worked before only by accident, but should work now by design.
|
#
198725 |
|
31-Oct-2009 |
nwhitehorn |
Remove an unnecessary sync that crept in the last commit.
|
#
198723 |
|
31-Oct-2009 |
nwhitehorn |
Loop on blocked threads when using ULE scheduler, removing an XXX MP comment.
|
#
197962 |
|
11-Oct-2009 |
nwhitehorn |
Correct another typo. Actually save the condition register instead of overwriting r12 by mistake.
|
#
190704 |
|
04-Apr-2009 |
marcel |
Perform a dummy stwcx. when we switch contexts. The context being switched out may hold a reservation. The stwcx. will clear the reservation. This is architecturally recommended.
The scenario this addresses is as follows: 1. Thread 1 performs a lwarx and as such holds a reservation. 2. Thread 1 gets switched out (before doing the matching stwcx.) and thread 2 is switched in. 3. Thread 2 performs a stwcx. to the same reservation granule. This will succeed because the processor has the reservation even though thread 2 didn't do the lwarx.
Note that on some processors the address given the stwcx. is not checked. On these processors the mere condition of having a reservation would cause the stwcx. to succeed, irrespective of whether the addresses are the same. The dummy stwcx. is especially important for those processors.
|
#
188860 |
|
20-Feb-2009 |
nwhitehorn |
Add Altivec support for supported CPUs. This is derived from the FPU support code, and also reducing the size of trapcode to fit inside a 32 byte handler slot.
Reviewed by: grehan MFC after: 2 weeks
|
#
183088 |
|
16-Sep-2008 |
marcel |
Set pcpup->pc_curthread and pcpup->pc_curpcb before calling pmap_activate. While pmap_activate doesn't need either, we do need a valid curthread if we enable KTR_PMAP.
|
#
178628 |
|
27-Apr-2008 |
marcel |
MFp4: SMP support
|
#
176742 |
|
02-Mar-2008 |
raj |
Unify and generalize PowerPC headers, adjust AIM code accordingly.
Rework of this area is a pre-requirement for importing e500 support (and other PowerPC core variations in the future). Mainly the following headers are refactored so that we can cover for low-level differences between various machines within PowerPC architecture:
<machine/pcpu.h> <machine/pcb.h> <machine/kdb.h> <machine/hid.h> <machine/frame.h>
Areas which use the above are adjusted and cleaned up.
Credits for this rework go to marcel@
Approved by: cognet (mentor) MFp4: e500
|
#
172887 |
|
23-Oct-2007 |
grehan |
Cut over to ULE on PowerPC
kern/sched_ule.c - Add __powerpc__ to the list of supported architectures
powerpc/conf/GENERIC - Swap SCHED_4BSD with SCHED_ULE
powerpc/powerpc/genassym.c - Export TD_LOCK field of thread struct
powerpc/powerpc/swtch.S - Handle new 3rd parameter to cpu_switch() by updating the old thread's lock. Note: uniprocessor-only, will require modification for MP support.
powerpc/powerpc/vm_machdep.c - Set 3rd param of cpu_switch to mutex of old thread's lock, making the call a no-op.
Reviewed by: marcel, jeffr (slightly older version)
|
#
139825 |
|
07-Jan-2005 |
imp |
/* -> /*- for license, minor formatting changes
|
#
132520 |
|
22-Jul-2004 |
grehan |
Update the callframe structure to leave space for the frame pointer and saved link register as per the ABI call sequence. Update code that uses this (fork_trampoline etc) to use the correct genassym'd offsets.
This fixes the 'invalid LR' message when backtracing kernel threads in DDB.
|
#
118893 |
|
14-Aug-2003 |
grehan |
Update powerpc to use the (old thread,new thread) calling convention for cpu_throw() and cpu_switch().
|
#
112429 |
|
20-Mar-2003 |
grehan |
Enable the FPU on first use per-thread and save state across context switches. Not as lazy as it could be. Changing FPU state with sigcontext still TODO.
fpu.c - convert some asm to inline C, and macroize fpu loads/stores swtch.S - call out to save/restore fpu routines trap.c - always call enable_fpu, since this shouldn't be called once the FPU has been enabled for a thread genassym.c - define for pcb fpu flag
|
#
105611 |
|
21-Oct-2002 |
grehan |
Add the USER_SR segment register to pcb state. Initialize correctly, and save/restore during a context switch.
The USER_SR could be overwritten when the current thread was switched out with a faulting copyin/copyout.
Approved by: Benno
|
#
99887 |
|
12-Jul-2002 |
jhb |
Set the thread state of the newly chosen to run thread to TDS_RUNNING in choosethread() in MI C code instead of doing it in in assembly in all the various cpu_switch() functions. This fixes problems on ia64 and sparc64.
Reviewed by: julian, peter, benno Tested on: i386, alpha, sparc64
|
#
99659 |
|
09-Jul-2002 |
benno |
Changes for KSE3.
Submitted by: Peter Grehan <peterg@ptree32.com.au>
|
#
99036 |
|
29-Jun-2002 |
benno |
To quote Peter:
The case in cpu_switch() where there isn't a higher priority thread (choosethread() == curthread) uses r4 as the PCB context pointer. However, the use of r4 after the label L2 is incorrect, since it was probably trashed by the call to choosethread, and in any case was set up to curthread at the start of the routine.
This condition will occur when an interrupt thread schedules a netisr, which is a lower priority thread.
Another (probably unnecessary) difference is that I was paranoid about register trashing, so I decided to save r2 and r13 as well.
Submitted by: Peter Grehan <peterg@ptree32.com.au>
|
#
96252 |
|
09-May-2002 |
benno |
The per-cpu curpmap is now set by pmap_activate. We don't need to do it here anymore.
|
#
95719 |
|
29-Apr-2002 |
benno |
Commit of stuff that's been sitting in my tree for a while.
Highlights include: - New low-level trap code from NetBSD. The high level code still needs a lot of work. - Fixes for some pmap handling in thread switching. - The kernel will now get to attempting to jump into init in user mode. There are some pmap/trap issues which prevent it from actually getting there though.
Obtained from: NetBSD (parts)
|
#
91486 |
|
28-Feb-2002 |
benno |
cpu_switch now works, for kthreads at least.
|
#
91467 |
|
28-Feb-2002 |
benno |
Make fork work, at least for kthreads. Switching still has some issues.
|
#
90643 |
|
14-Feb-2002 |
benno |
Complete rework of the PowerPC pmap and a number of other bits in the early boot sequence.
The new pmap.c is based on NetBSD's newer pmap.c (for the mpc6xx processors) which is 70% faster than the older code that the original pmap.c was based on. It has also been based on the framework established by jake's initial sparc64 pmap.c.
There is no change to how far the kernel gets (it makes it to the mountroot prompt in psim) but the new pmap code is a lot cleaner.
Obtained from: NetBSD (pmap code)
|
#
87702 |
|
11-Dec-2001 |
jhb |
Overhaul the per-CPU support a bit:
- The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list.
Tested on: alpha, i386 Reviewed by: peter, jake
|
#
86066 |
|
05-Nov-2001 |
mp |
Add enable_fpu/save_fpu for handling the floating point registers in the PCB.
Obtained from: NetBSD
|
#
84946 |
|
15-Oct-2001 |
mp |
Fix typo.
|
#
84945 |
|
15-Oct-2001 |
mp |
Save WIP. Partial rewrite of cpu_switch() and savectx(). This makes it closer to working but still needs some work to properly switch the full context (such as saving the fpu registers, switch stacks, etc.). Also, remove some dead code that was mixed in.
|
#
83682 |
|
20-Sep-2001 |
mp |
Update PowerPC MD code to compile and do initial bootstrap based on recent changes (KSE and VM requiring physmem to be setup).
Reviewed by: benno, jhb, julian
|
#
83366 |
|
12-Sep-2001 |
julian |
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process.
Sorry john! (your next MFC will be a doosie!)
Reviewed by: peter@freebsd.org, dillon@freebsd.org
X-MFC after: ha ha ha ha
|
#
81724 |
|
15-Aug-2001 |
jhb |
FreeBSD doesn't use a want_resched variable. Instead, the PS_NEEDRESCHED p_sflag is managed in a MI fashion.
|
#
77957 |
|
10-Jun-2001 |
benno |
Bring in NetBSD code used in the PowerPC port.
Reviewed by: obrien, dfr Obtained from: NetBSD
|