- Copy stable/10@296371 to releng/10.3 in preparation for 10.3-RC1
builds.
- Update newvers.sh to reflect RC1.
- Update __FreeBSD_version to reflect 10.3.
- Update default pkg(8) configuration to use the quarterly branch.

Approved by: re (implicit)

MFC r280451:
Remove from legacy ata(4) driver support for hardware, supported by newer
and more functional drivers ahci(4), siis(4) and mvs(4).

This removes about 3400 lines of code, unused since FreeBSD 9.0 release.

MFC r275101:
Add bunch of PCI IDs of Intel Wildcat Point (9 Series) chipsets.

MFC r273328: Add another PCI ID for JMB368 PATA controller.

MFC r258162:
Add some more IDs for Intel ATA, AHCI and USB controllers.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Add new Coleto Creek device support: SATA, SMBus, and Watchdog devices.

MFC after: 1 week

Remove all legacy ATA code parts, not used since options ATA_CAM enabled in
most kernels before FreeBSD 9.0. Remove such modules and respective kernel
options: atadisk, ataraid, atapicd, atapifd, atapist, atapicam. Remove the
atacontrol utility and some man pages. Remove useless now options ATA_CAM.

No objections: current@, stable@
MFC after: never

Add Intel Lynx Point PCH SATA Controller Device IDs

Add IDs for SATA controllers on AMD Hudson-2 series chipsets.
I am not exactly sure about the naming due to lack of specs on AMD site,
but it is better to have some identification then none at all.

MFC after: 1 month

Add IDs for JMicron JMB360/JMB362 AHCI SATA controllers.

MFC after: 1 week

- First pass at const'ifying ata(4) as appropriate.
- Use DEVMETHOD_END.
- Use NULL instead of 0 for pointers

MFC after: 1 week

Remove remnants of ATA_LOCKING uses in the ATA_CAM case and wrap it
along with functions, SYSCTLs and tunables that are not used with
ATA_CAM in #ifndef ATA_CAM, similar to the existing #ifdef'ed ATA_CAM
code for the other way around. This makes it easier to understand
which parts of ata(4) actually are used in the new world order and
to later on remove the !ATA_CAM bits. It also makes it obvious that
there is something fishy with the C-bus front-end as well as in the
ATP850 support, as these used ATA_LOCKING which is defunct in the
ATA_CAM case. When fixing the former, ATA_LOCKING probably needs to
be brought back in some form or other.

Reviewed by: mav
MFC after: 1 week

Fix names of some Marvell SATA chips. It looks like chips with proprietary
interface supported by mvs(4) are 88SX, while AHCI-like chips are 88SE.

PR: kern/165271
Submitted by: Jia-Shiun Li <jiashiun@gmail.com>
MFC after: 1 week

Convert files to UTF-8

Add 0x2826 device ID for C600 (Patsburg) SATA controller in RAID mode.

Reviewed by: mav
Approved by: scottl

Add PCI IDs for the Intel ICH9M SATA controllers.

MFC after: 2 weeks

Some dmesg cosmetics:
- for the legacy PCI ATA channels move channel number out of the device
description, same as it is for ahci(4), siis(4) and mvs(4);
- add device description for the ISA ATA channels.

- Use mutex to serialize index/data register pair usage, when
accessing SATA registers. Unserialized access under heavy load caused
wrong speed reporting and potentially could cause device loss.
- To free memory and other resources (including above), allocated
during chipinit() method call on attach, add new chipdeinit() method,
called during driver detach.

Submitted by: Andrew Boyer <aboyer@averesystems.com> (initial version)
Approved by: re (kib)
MFC after: 1 week

Chipset support for the new Intel Panther Point PCH, thanks
to Seth Heasley for preparing the changes.

- Fix mapping of the last two SATA ports on 6-port Intel controllers.
This improves hard-reset and hot-plug on these ports.
- Device with ID 0x29218086 is a 2-port variant of ICH9 in legacy mode.
Skip probing for nonexistent slave devices there.

Support for the new Patsburg PCH chipset:
- SMBus Controller
- SATA Controller
- HD Audio Controller
- Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days

Support for the new DH89xxCC PCH chipset including:
- SATA controller
- Watchdog timer
- SMBus controller

Add IDs for VIA VX900 chipset SATA controller.
(Missed part of r215428)

Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.

Submitted by: jfv@
MFC after: 1 week

Report ATA/SATA channel number to NewBus at location string.

- Add ALI M5228 PATA ID.
- Add missed DMA initialization for ALI SATA chips.

Add support for SATA part of Marvell 88SE912x controllers to ahci(4).
Limit early revisions from 6Gb/s to 3Gb/s by default, or they negotiate
only 1.5Gbps, when 3Gb/s devices connected.

Add dummy driver for PATA part of these controllers, preventing generic
driver attach them. It causes system freeze when SATA controller used after
PATA was touched.

Add support for Intel SCH PATA controller.

PR: kern/140251

Add VIA CX700/VX800 chipsets SATA/PATA support.

PR: kern/121521
Tested by: Alex Deiter

MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by: nwitehorn (powerpc part)

Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.

Add support for SATA ports on SATA+PATA Marvell controllers.
These controllers provide combination of AHCI for SATA and legacy
PCI ATA for PATA. Use same solution as used for JMicron controllers.
Add IDs of Marvell 88SX6102, 88SX6111. 88SX6141 alike controllers

Add more ICH10 chip IDs.

Submitted by: Dmitry S. Luhtionov <mitya@cabletv.dp.ua>

Add IDs for nVidia MCP65/77/79/89 SATA conntrollers.

Add support for different request block format used by Gen-IIe Marvell SATA.
This adds support for Marvell 6042/7042 chips and Adaptec 1430SA controller.

Add two more VIA SATA chip IDs.

PR: kern/135057

Move non-PCI prototypes from ata-pci.h -> ata-all.h.

This removes unnecessary PCI #includes dependency for systems with ATA
controllers living at non-PCI buses.

Submitted by: Piotr Ziecik
Obtained from: Semihalf

Add another PCI id for Nvidia nForce MCP67, found in several Acer laptops.

- Add a void pointer to the ata-pci controller softc to allow
chipset-specific code to attach chipset-specific data.
- Use chipset-specific data in the acard and promise chipsets rather than
changing the ivars of ATA PCI devices. ivars are reserved for use by the
parent bus driver and are _not_ available for use by devices directly.
This fixes a panic during sysctl -a with certain Promise controllers with
ACPI enabled.

Reviewed by: mav
Tested by: Magnus Kling (kingfon @ gmail) (on 7)
MFC after: 3 days

Add ID of one more SII3132 revision found on adaptec aar-1225sa rev a2.

PR: kern/127289

- Always force AHCI mode on a ATI/AMD SB600/700/800 SATA controller. These
controllers may be configured as legacy IDE mode by modifying subclass and
progif without actually changing PCI device IDs. Instead of complicating
code, we always force AHCI mode while probing. Also we restore AHCI mode
while resuming per ATI/AMD register programming/requirement guides.
- Fix SB700/800 "combined" mode. Unlike SB600, this PATA controller can
combine two SATA ports and emulate one PATA channel as primary or secondary
depending on BIOS configuration. When the combined mode is disabled, this
channel disappears and it works just like SB600 PATA controller, however.
- Add more PCI device IDs for SB700/800 and adjust device descriptions.
SB800 shares the same PCI device IDs and added two more SATA IDs.

Integrate user/mav/ata branch:

Add ch_suspend/ch_resume methods for PCI controllers and implement them
for AHCI. Refactor AHCI channel initialization according to it.

Fix Port Multipliers operation. It is far from perfect yet, but works now.
Tested with JMicron JMB363 AHCI + SiI 3726 PMP pair.
Previous version was also tested with SiI 4726 PMP.

Hardware sponsored by: Vitsch Electronics / VEHosting.nl

Improve ata_reinit():
- protect againtst recursions,
- add new devices detection using ata_identify().

Improve ata_identify():
- do not add duplicate device if device already exist.

Rework SATA hot-plug events handling. Instead of unsafe duplicate
implementation use common ata_reinit() to handle all state changes.

All together this gives quite stable and robust cold- and hot-plug operation,
invariant to false, lost and duplicate events.

Handle nForce MCP67 and MCP73 SATA controllers as AHCI. They report itself
as ATA RAID, but generic ATAPCI driver unable to detect drives there. AHCI
driver reported to handle them fine. Linux does the same.

Submitted by: Andrey V. Elsukov on stable@

Quite mechanical ch_detach implementations for all atapci subdrivers.
Some dmainit call fixes for previous commit.

As soon as they called in only same one place (ata_pcichannel_attach()),
join allocate() and dmainit() atapci subdriver's channel initialization
methods into single ch_attach() method.

As opposite to ch_attach() add new ch_detach() method to deallocate/disable
channel.

Give atapci knowledge about set of implemented AHCI ports. It is possible
to not allocate them after the recent ata channels enumeration changes.
It allows to save some resources, not bother user with unexisting hardware
and not check unimplemented ports status on every interrupt.

Add initial single-vector MSI support into atapci driver.
Works fine with AHCI and theoretically other MSI capable devices.

At this moment support disabled by default. To enable it, set
"hint.atapci.X.msi=1" device hint.

Call ata_legacy() only once on attach and save it's result. Scanning PCI
configuration registers (which are not going to change) on every interrupt
looks expensive, especially when interrupt is shared. Profiling shows me 3%
of time spent by atapci0 on pure network load due to IRQ sharing with em0.

Restore AHCI suspend/resume support,
broken with modularization commit (rev 183724).

Add support for Marvell PATA M88SX6121.

PR: 129154
Submitted by: João Barros <joao.barros at gmail.com>
MFC after: 1 month

This is the roumored ATA modulerisation works, and it needs a little explanation.

If you just config KERNEL as usual there should be no apparent changes, you'll get all chipset support code compiled in.

However there is now a way to only compile in code for chipsets needed on a pr vendor basis. ATA now has the following "device" entries:

atacore: ATA core functionality, always needed for any ATA setup

atacard: CARDBUS support
atacbus: PC98 cbus support
ataisa: ISA bus support
atapci: PCI bus support only generic chipset support.

ataahci: AHCI support, also pulled in by some vendor modules.

ataacard, ataacerlabs, ataadaptec, ataamd, ataati, atacenatek, atacypress, atacyrix, atahighpoint, ataintel, ataite, atajmicron, atamarvell, atamicron, atanational, atanetcell, atanvidia, atapromise, ataserverworks, atasiliconimage, atasis, atavia; Vendor support, ie atavia for VIA chipsets

atadisk: ATA disk driver
ataraid: ATA softraid driver

atapicd: ATAPI cd/dvd driver
atapifd: ATAPI floppy/flashdisk driver
atapist: ATAPI tape driver

atausb: ATA<>USB bridge
atapicam: ATA<>CAM bridge

This makes it possible to config a kernel with just VIA chipset support by having the following ATA lines in the kernel config file:

device atacore
device atapci
device atavia

And then you need the atadisk, atapicd etc lines in there just as usual.

If you use ATA as modules loaded at boot there is few changes except the rename of the "ata" module to "atacore", things looks just as usual.
However under atapci you now have a whole bunch of vendor specific drivers, that you can kldload individually depending on you needs. Drivers have the same names as used in the kernel config explained above.

Add ICH10 PCI id's.
Submitted by: Xin Li

Fix the number of PATA ports on newer ICHX chips, they have just 1 port not 2.

Add support for the ITE 8213 controller.
Thanks goes to ITE who provided docs and feedback and made this possible.

Minor fixups to the Intel ICH code for bugs found while doing this.
(ITE8213 is very semilar to an Intel ICH)

MFC after: 1 week

Cleanup the AHCI code a bit.
Add suspend/resume for AHCI, general methods added.

Inspired by: Andrey V. Elsukov

Add one more SII3132 chip PCI ID found on Adaptec Serial ATA II RAID 1220SA.

Submitted by: Dmitry S. Luhtionov <mitya@cabletv.dp.ua>

Detect ATA controllers in the Macbook3.

PR: 118135
Submitted by: ed
Approved by: imp (mentor, implicit)
MFC after: 1 week

Add new device id for ICH8M, which supports greater than UDMA33 mode
when it worked as generic IDE.

PR: 125422
Submitted by: Andrey V. Elsukov <bu7cher at yandex dot ru>
Approved by: imp (mentor, implicit)
MFC after: 1 week

Add support for the ICH9 in non AHCI mode (RAID mode).

Submitted by: Andrey V. Elsukov <bu7cher at yandex dot ru>
Tested by: Vitalij L. Fadeev <fvl at mail dot ru>
Approved by: imp (mentor, implicit)
MFC after: 1 week

Add HW level support for the Adaptec 1420SA controller.

Dont call hw.status recursively.

Spotted by: Marcel Moolenaar

Add experimental support for SATA Port Multipliers

Support is working on the Silicon Image SiI3124/3132.
Support is working on some AHCI chips but far from all.

Remember this is WIP, so test reports and (constructive) suggestions are welcome!

Add proper support for the SATA/AHCI part of IXP[67]00

Add generic support for chipsets that say they support AHCI. This should catch new chipsets that we dont know but that we should support.
Add a few new PCI id's.
Misc cleanups.

Add PCI ID for ICH9 AHCI w/ two adapters.

Tested by: Abdullah Ibn Hamad Al-Marri <almarrie gmail com>
Approved by: sos
Approved by: re (kensmith)

Add support for the VIA 8237S
Fix the LBA28/LBA48 crossover bug.

Approved by: re@

Recognize the CS5536 support chip for the AMD Geode LX CPU to enable
UDMA modes.

Please notice that Soekris NET5501 bios versions before 1.32f has a bug
that prevents this from working.

Approved by: re (gnn)
MFC: 2 weeks

Add PCI IDs for Intel ICH9.

PR: kern/114473
Submitted by: Michael Fuckner <michael@fuckner.net>
MFC after: 2 weeks
OK'ed by: sos
Approved by: re (bmah)

Add support for the nVidia MCP61 series chipset.

Approved by: re (mux@)

Add support for the Silicon Image SiI 3124 and SiI 3132.

HW donated by: Adriaan de Groot

o break newbus api: add a new argument of type driver_filter_t to
bus_setup_intr()

o add an int return code to all fast handlers

o retire INTR_FAST/IH_FAST

For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current

Reviewed by: many
Approved by: re@

Add support for the NetCell NC3000/5000 series SATA RAID cards.

Reviewed by: sos
Approved by: imp (mentor)
MFC after: 1 week

Add support for the Marvell 6101/6145 PATA chips used on many new Intel boards.

HW donated by: Sentex

Add new PATA only JMicron chip.

Add support for a few more Serverworks and lookalikes chips.

Add support for VIA 8237A.

Add support for the ICH8 and ESB2 chips, also add a few other missing ICH7 parts.

HW donated by: JMicron

Unbreak nForce4 SATA support.
Hopefully I dont break something else this time.....

Unbreak nForce3 SATA support.

Finally fix support for the newer MCP51/MCP55 nVidia chipsets.
The register layout has changed since the original NV4 - sigh.
Hotplug support has been fixed for all nVidia chipsets that supports it
(including the MCP51/55).

HW donated by: Kingsley College

Add preliminary support for the Serverworks HT1000 chip.

HW sponsored by: Yahoo!

Add support for the JMicron JMB361, 365 and 366 chips.

HW and documentation kindly provided by JMicron.

Add support for the JMicron JMB363 dual SATA + single PATA controller.
Documentation and HW kindly provided by JMicron.

Add support for the JMicron JMB360 SATAII controller.
Thanks to JMicron for providing needed info.

HW donated by: Ralf Folkerts

Whitespace cleanup.

Add support for using DMA on dump, greatly speeds up the dump process.
Add dump support in ataraid.

Get rid of the advertising clause in the copyright.

Add initial support for the Marvell 88SX[56]0[48][01] series of SATA chips.

Hardware donated by: Matthew Jacob
Hardware donated by: Y!

Cleanup the strings for printing chipset names, saves quite some space.

Add a couble new nVidia chips now we are here.

Add support for VIA VT8251 southbridge.
SATA support for now in compat mode, but all 4 channels usable.

Update the ICH7 support so it deals better with chips without AHCI.

Update Intel MatrixRAID support to be able to pick up RAID0+1 (RAID10)
and RAID5 arrays without panic'ing.
This has the side effect of now also supporting multiple volumes on
MatrixRAID's now I have the metadata better understood..

HW sponsored by: Mullet Scandinavia AB

Add support for the ATI IXP[234]00 series chipsets.

HW donated by: sentex

Fix support for the VIA 6421 controller.

Apply fix for "pr82261 DMA-support on Sparc64 broken"
The Acer chip or wiring that SUN uses has problems that this patch
tries to work around.
Original patch by Marius Strobl, hacked into shape by me..

Add support for the Promise PDC4071[89] chips used on fx the Fasttrak TX4300.
Docs kindly provided by Promise.

Add support for the ITE IT8211F controller.

Add support for the Intel 31244.
Most code by the submitters, hammered upon to get the right ATA fell by me.

Submitted by: Olivier Houchard
Submitted by: Jia-Shiun Li

Change the way ioctls are issue to ATA.
The most prominent part is that its now possible to issue ata_requests
directly to say acd0, instead of going through the cumbersome /dev/ata
device.

Cleanup comments

Add new Intel PCI ID's for the ICH7 chips (untested).

Take newbusification one step further, ie use the device_t more consequently
all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.

Sponsored by: pair.com

Add one more Promise SATAII/150 chip id.

Refine the SATA PHY code so the time consumed during probe is reduced.

Add the older nVidia nForce2 SATA chip to supported HW.

Add support for the PHY on nVidia, SiS and VIA chips
This code is done blindfolded as I dont have such HW here, so reports
of success/failure are most welcome.

More SATA PHY cleanups.

Generalise the SATA PHY handling code so it wont be duplicated for
each SATA chip.
Promise and Silicon Image are the current candidates for this.

Add firstshot support for Acer Labs Inc SATA parts
Update ALi PATA support to handle ATA133 as well

Correct the PCI ID for the SiS 965, and add support for the SATA part
that was left our by accident.

Prodded by: Patrik Backlund

This is the much rumoured ATA mkIII update that I've been working on.

o ATA is now fully newbus'd and split into modules.
This means that on a modern system you just load "atapci and ata"
to get the base support, and then one or more of the device
subdrivers "atadisk atapicd atapifd atapist ataraid".
All can be loaded/unloaded anytime, but for obvious reasons you
dont want to unload atadisk when you have mounted filesystems.

o The device identify part of the probe has been rewritten to fix
the problems with odd devices the old had, and to try to remove
so of the long delays some HW could provoke. Also probing is done
without the need for interrupts, making earlier probing possible.

o SATA devices can be hot inserted/removed and devices will be created/
removed in /dev accordingly.
NOTE: only supported on controllers that has this feature:
Promise and Silicon Image for now.
On other controllers the usual atacontrol detach/attach dance is
still needed.

o Support for "atomic" composite ATA requests used for RAID.

o ATA RAID support has been rewritten and and now supports these
metadata formats:
"Adaptec HostRAID"
"Highpoint V2 RocketRAID"
"Highpoint V3 RocketRAID"
"Intel MatrixRAID"
"Integrated Technology Express"
"LSILogic V2 MegaRAID"
"LSILogic V3 MegaRAID"
"Promise FastTrak"
"Silicon Image Medley"
"FreeBSD PseudoRAID"

o Update the ioctl API to match new RAID levels etc.

o Update atacontrol to know about the new RAID levels etc
NOTE: you need to recompile atacontrol with the new sys/ata.h,
make world will take care of that.
NOTE2: that rebuild is done differently from the old system as
the rebuild is now done piggybacked on read requests to the
array, so atacontrol simply starts a background "dd" to rebuild
the array.

o The reinit code has been worked over to be much more robust.

o The timeout code has been overhauled for races.

o Support of new chipsets.

o Lots of fixes for bugs found while doing the modulerization and
reviewing the old code.

Missing or changed features from current ATA:

o atapi-cd no longer has support for ATAPI changers. Todays its
much cheaper and alot faster to copy those CD images to disk
and serve them from there. Besides they dont seem to be made
anymore, maybe for that exact reason.

o ATA RAID can only read metadata from all the above metadata formats,
not write all of them (Promise and Highpoint V2 so far). This means
that arrays can be picked up from the BIOS, but they cannot be
created from FreeBSD. There is more to it than just the missing
write metadata support, those formats are not unique to a given
controller like Promise and Highpoint formats, instead they exist
for several types, and even worse, some controllers can have
different formats and its impossible to tell which one.
The outcome is that we cannot reliably create the metadata of those
formats and be sure the controller BIOS will understand it.
However write support is needed to update/fail/rebuild the arrays
properly so it sits fairly high on the TODO list.

o So far atapicam is not supported with these changes. When/if this
will change is up to the maintainer of atapi-cam so go there for
questions.

HW donated by: Webveveriet AS
HW donated by: Frode Nordahl
HW donated by: Yahoo!
HW donated by: Sentex
Patience by: Vife and my boys (and even the cats)

Add support for the ITE IT8212F controller.

HW donated by: Yahoo!

Add first shot on support for the new Promise SATAII chips.

HW donated by: pil.dk

Add support for the ICH6 in legacy mode.
The AHCI part is not supported yet, but is in the works.

5.3 RC1 candidate

Fix the PC98 lockups on boot.
The interchannel locking for PC98 needed to be updated to match the
rest of the locking in ATA.

Cleanup the defines used for various chipsets.
Add new nVidia controllers.

Increase robustness of SATA handling.

Spring cleanup of macros

Make the test for ATA PCI legacy addressing mode more robust.
Add code (currently ifdef'd out) to allow ATA PCI native addressing.
Fix the altio offset for ATA PCI devices.

Add support for the Promise command sequencer present on all modern Promise
controllers (PDC203** PDC206**).

This also adds preliminary support for the Promise SX4/SX4000 but *only*
as a "normal" Promise ATA controller (ATA RAID's are supported though
but only RAID0, RAID1 and RAID0+1).

This cuts off yet another 5-8% of the command overhead on promise controllers,
making them the fastest we have ever had support for.

Work is now continuing to add support for this in ATA RAID, to accellerate
ATA RAID quite a bit on these controllers, and especially the SX4/SX4000
series as they have quite a few tricks in there..

This commit also adds a few fixes to the SATA code needed for proper support.

Update the SiS support to distinguish older southbridges better.

Add support for detaching PCI controllers.

This adds support for cardbus ATA/SATA controllers. I get roughly the
same transfer speeds as on true PCI controllers. Nice to be able to add
a couble of "real" disks to a laptop :)

Add yet another VIA pci id.

Add support for the sii3512 SATA chip.

Fix support for the Promise TX4 on amd64.
Somehow the bridge on there shows up with another PCI id than
it does on x86, no idea why...

Cleanups/cosmetics.

Update the support for the VIA 8237 southbridge.

Add support for the Silicon Image 3114 4 channel SATA controller.

Add support for the SiS 661 chipset (using SiS 963 south).

Workaround for errata on early versions of the sii3112.

Approved by: re@

Add support for the SiS964 ATA/SATA southbridge.
This could not have been done without the support from kuriyama.

Approved by: re@

Add support for the VIA 8237 (both PATA and SATA part).
Cleanup the SATA support a bit now we are here anyways.

Add another ID for the SiI3112a SATA chip as used on the Adaptec 1210SA.
RAID support is still in the works, so for now just normal ATA ops.

Sponsored by: Matt Douhan(www.fruitsalad.org)

Support the nForce3 chip found on Opteron motherboards:
atapci0: <nVidia nForce3 UDMA133 controller>

Approved by: sos

Cleanup the dma int/alloc/free code.

This is a major rework of the ATA driver (ATAng)

Restructure the way ATA/ATAPI commands are processed, use a common
ata_request structure for both. This centralises the way requests
are handled so locking is much easier to handle.

The driver is now layered much more cleanly to seperate the lowlevel
HW access so it can be tailored to specific controllers without touching
the upper layers. This is needed to support some of the newer
semi-intelligent ATA controllers showing up.

The top level drivers (disk, ATAPI devices) are more or less still
the same with just corrections to use the new interface.

Pull ATA out from under Gaint now that locking can be done in a sane way.

Add support for a the National Geode SC1100. Thanks to Soekris engineering
for sponsoring a Soekris 4801 to make this support.

Fixed alot of small bugs in the chipset code for various chips now
we are around in that corner anyways.

Update the SATA support code to work more correctly with
real SATA disks now that I can test it.

Add support for the SiI 3112 SATA chip using memory mapped I/O.
Update the support for the SiI 0680 to use the memio interface as well.

Sponsored by: David Leimbach <leimy2k@mac.com> (3112 based controller)
Sponsored by: FreeBSD Systems (www.FreeBSDsystems.com) (SATA disks)

Support the ICH5 SATA part.
Fix HPT374 UDMA133 timing.
Fix Promise ID.
Cosmetics on probe print for Promise & HPT.

Approved by: re

Add a couble new Intel PCI id's

Approved by: re@

Add PCI ID's for the Intel ICH5 (82801EB) chipset.

Approved by: re (murray)
Sponsored by: The Weather Channel

I'm pleased to announce that Promise is now supporting the FreeBSD
project by providing documentation (under NDA) and hardware for
testing. This commit is the first result of the cooperation, and
adds support for several of their new controllers that we didn't
support before (and probably newer would have without this arrangement).

Add support for the Promise SATA150 TX2/TX4 and the Promise TX4000
controllers. This also adds support for various motherboard fitted
Promise SATA/ATA chips.
Note that this code uses memory mapped registers to minimize overhead.
I belive FreeBSD has made another first in the Open Source world
by being able to release support for this :)

Add a few more older SiS ID's.

Third round of updates to the ATA driver.

More DMA cleanups, including fix for breakage on older Promise controllers.

Add more ways of getting to the ATA registers.

Second round of updates to the ATA driver.

Clean up the DMA interface too much unneeded stuff crept in with
the busdma code back when.

Modify the ATA_IN* / ATA_OUT* macros so that resource and offset
are gotten from a table. That allows for new chipsets that doesn't
nessesarily have things ordered the good old way. This also removes
the need for the wierd PC98 resource functions.

Tested on: i386, PC98, Alpha, Sparc64

Minor cleanup of the Promise code.

Fix support for Acer chips. The UDMA enable regs wasn't set properly.

Fix support for the old CMD 646 chips, interrupt setup was wrong.

First round off updates/fixes to the ATA driver.

This moves all chipset specific code to a new file 'ata-chipset.c'.
Extensive use of tables and pointers to avoid having the same switch
on chipset type in several places, and to allow substituting various
functions for different HW arch needs.
Added PIO mode setup and all DMA modes.
Support for all known SiS chipsets. Thanks to Christoph Kukulies for
sponsoring a nice ASUS P4S8X SiS648 based board for this work!

Tested on: i386, PC98, alpha and sparc64