#
296373 |
|
04-Mar-2016 |
marius |
- Copy stable/10@296371 to releng/10.3 in preparation for 10.3-RC1 builds. - Update newvers.sh to reflect RC1. - Update __FreeBSD_version to reflect 10.3. - Update default pkg(8) configuration to use the quarterly branch.
Approved by: re (implicit) |
#
284900 |
|
28-Jun-2015 |
neel |
MFC r282209: Emulate the 'bit test' instruction.
MFC r282259: Re-implement RTC current time calculation to eliminate the possibility of losing time.
MFC r282281: Advertise the MTRR feature via CPUID and emulate the minimal set of MTRR MSRs.
MFC r282284: When an instruction cannot be decoded just return to userspace so bhyve(8) can dump the instruction bytes.
MFC r282287: Don't require <sys/cpuset.h> to be always included before <machine/vmm.h>.
MFC r282296: Emulate MSR_SYSCFG which is accessed by Linux on AMD cpus when MTRRs are enabled.
MFC r282301: Relax limits when transitioning a vector from the IRR to the ISR and also when extinguishing it from the ISR in response to an EOI.
MFC r282335: Advertise an additional memory BAR in the "dummy" device emulation.
MFC r282336: Emulate machine check related MSRs to allow guest OSes like Windows to boot.
MFC r282351: Don't advertise the Intel SMX capability to the guest.
MFC r282407: Emulate the 'CMP r/m8, imm8' instruction.
MFC r282519: Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE.
MFC r282520: Emulate guest writes to EFER_MSR properly.
MFC r282558: Deprecate the 3-way return values from vm_gla2gpa() and vm_copy_setup().
MFC r282571: Check 'td_owepreempt' and yield the vcpu thread if it is set.
MFC r282595: Allow byte reads of AHCI registers.
MFC r282784: Handling indirect descriptors is a capability of the host and not one that needs to be negotiated. Use the host capabilities field and not the negotiated field when verifying that indirect descriptors are supported.
MFC r282788: Allow configuration of the sector size advertised to the guest.
MFC r282865: Set the subvendor field in config space to the vendor ID. This is required by the Windows virtio drivers to correctly match a device.
MFC r282922: Bump the size of the blockif scatter-gather list to 67.
MFC r283075: Fix off-by-one in array index bounds check. bhyveload would allow you to create 33 entries on an array that only has 32 slots
MFC r283168: Temporarily revert r282922 which bumped the max descriptors.
MFC r283255: Emulate the "CMP r/m, reg" instruction (opcode 39H).
MFC r283256: Add an option "--get-vmcs-exit-inst-length" to display the instruction length of the instruction that caused the VM-exit.
MFC r283264: Change the header type of the emulated host-bridge from type 1 to type 0.
MFC r283293: Don't rely on the 'VM-exit instruction length' field in the VMCS to always have an accurate length on an EPT violation.
MFC r283299: Remove bogus verification of instruction length after instruction decode.
MFC r283308: Exceptions don't deliver an error code in real mode.
MFC r283657: Fix non-deterministic delays when accessing a vcpu that was in "running" or "sleeping" state.
MFC r283973: Use tunable 'hw.vmm.svm.features' to disable specific SVM features even though they might be available in hardware. Use tunable 'hw.vmm.svm.num_asids' to limit the number of ASIDs used by the hypervisor.
MFC r284046: Fix regression in 'verify_gla()' with the RIP-relative addressing mode.
MFC r284174: Support guest writes to the TSC by enabling the "use TSC offsetting" execution control.
|
#
284899 |
|
28-Jun-2015 |
neel |
MFC r279444: Allow passthrough devices to be hinted.
MFC r279683: When ICW1 is issued the edge sense circuit is reset which means that following an initialization a low-to-high transistion is necesary to generate an interrupt.
MFC r279925: Add -p parameter to list PCI device to pass through to the guest.
MFC r281559: Fix handling of BUS_PROBE_NOWILDCARD in 'device_probe_child()'.
MFC r280447: When fetching an instruction in non-64bit mode, consider the value of the code segment base address.
MFC r280725: Move legacy interrupt allocation for virtio devices to common code.
MFC r280775: Fix the RTC device model to operate correctly in 12-hour mode.
MFC r280929: Fix "MOVS" instruction memory to MMIO emulation.
MFC r280968: Display instruction bytes and %rip prior to aborting due to an instruction emulation error.
MFC r281145: Enhance the support for Group 1 Extended opcodes for CMP, AND, OR instructions.
MFC r281542: Initialize 'error' before use (Coverity IDs 1249748, 1249747, 1249751, 1249749)
MFC r281561: Prior to aborting due to an ioport error, it is always interesting to see what the guest's %rip is.
MFC r281611: If the number of guest vcpus is less than '1' then flag it as an error.
MFC r281612: Prefer 'vcpu_should_yield()' over checking 'curthread->td_flags' directly.
MFC r281630: Relax the check on which vectors can be delivered through the APIC. According to the Intel SDM vectors 16 through 255 are allowed to be delivered via the local APIC.
MFC r281879: Missing break in switch case (Coverity ID 1292499)
MFC r281946: Don't allow guest to modify readonly bits in the PCI config 'status' register.
MFC r281987: STOS/STOSB/STOSW/STOSD/STOSQ instruction emulation.
MFC r282206: Implement the century byte in the RTC.
|
#
276447 |
|
31-Dec-2014 |
neel |
MFC r276323 Implement "special mask mode" in vatpic.
|
#
276429 |
|
30-Dec-2014 |
neel |
MFC r273683 Move the ACPI PM timer emulation into vmm.ko.
MFC r273706 Change the type of the first argument to the I/O emulation handlers to 'struct vm *'.
MFC r273710 Add a comment explaining the intent behind the I/O reservation [0x72-0x77].
MFC r273744 Add foo_genassym.c files to DPSRCS so dependencies for them are generated. This ensures these objects are rebuilt to generate an updated header of assembly constants if needed.
MFC r274045 If the start bit, PxCMD.ST, is cleared and nothing is in-flight then PxCI, PxSACT, PxCMD.CCS and PxCMD.CR should be 0.
MFC r274076 Improve the ability to cancel an in-flight request by using an interrupt, via SIGCONT, to force the read or write system call to return prematurely.
MFC r274330 To allow a request to be submitted from within the callback routine of a completing one increase the total by 1 but don't advertise it.
MFC r274931 Change the lower bound for guest vmspace allocation to 0 instead of using the VM_MIN_ADDRESS constant.
MFC r275817 For level triggered interrupts clear the PIC IRR bit when the interrupt pin is deasserted.
MFC r275850 Fix 8259 IRQ priority resolver.
MFC r275952 Various 8259 device model improvements.
MFC r275965 Emulate writes to the IA32_MISC_ENABLE MSR.
|
#
276349 |
|
28-Dec-2014 |
neel |
MFC r270326 Fix a recursive lock acquisition in vi_reset_dev().
MFC r270434 Return the spurious interrupt vector (IRQ7 or IRQ15) if the atpic cannot find any unmasked pin with an interrupt asserted.
MFC r270436 Fix a bug in the emulation of CPUID leaf 0x4.
MFC r270437 Add "hw.vmm.topology.threads_per_core" and "hw.vmm.topology.cores_per_package" tunables to modify the default cpu topology advertised by bhyve.
MFC r270855 Set the 'inst_length' to '0' early on before any error conditions are detected in the emulation of the task switch. If any exceptions are triggered then the guest %rip should point to instruction that caused the task switch as opposed to the one after it.
MFC r270857 The "SUB" instruction used in getcc() actually does 'x -= y' so use the proper constraint for 'x'. The "+r" constraint indicates that 'x' is an input and output register operand.
While here generate code for different variants of getcc() using a macro GETCC(sz) where 'sz' indicates the operand size.
Update the status bits in %rflags when emulating AND and OR opcodes.
MFC r271439 Initialize 'bc_rdonly' to the right value.
MFC r271451 Optimize the common case of injecting an interrupt into a vcpu after a HLT by explicitly moving it out of the interrupt shadow.
MFC r271888 Restructure the MSR handling so it is entirely handled by processor-specific code.
MFC r271890 MSR_KGSBASE is no longer saved and restored from the guest MSR save area. This behavior was changed in r271888 so update the comment block to reflect this.
MFC r271891 Add some more KTR events to help debugging.
MFC r272197 mmap(2) requires either MAP_PRIVATE or MAP_SHARED for non-anonymous mappings.
MFC r272395 Get rid of code that dealt with the hardware not being able to save/restore the PAT MSR on guest exit/entry. This workaround was done for a beta release of VMware Fusion 5 but is no longer needed in later versions.
All Intel CPUs since Nehalem have supported saving and restoring MSR_PAT in the VM exit and entry controls.
MFC r272670 Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT'.
MFC r272710 Implement the FLUSH operation in the virtio-block emulation.
MFC r272838 iasl(8) expects integer fields in data tables to be specified as hexadecimal values. Therefore the bit width of the "PM Timer Block" was actually being interpreted as 50-bits instead of the expected 32-bit.
This eliminates an error message emitted by a Linux 3.17 guest during boot: "Invalid length for FADT/PmTimerBlock: 50, using default 32"
MFC r272839 Support Intel-specific MSRs that are accessed when booting up a linux in bhyve: - MSR_PLATFORM_INFO - MSR_TURBO_RATIO_LIMITx - MSR_RAPL_POWER_UNIT
MFC r273108 Emulate "POP r/m". This is needed to boot OpenBSD/i386 MP kernel in bhyve.
MFC r273212 Support stopping and restarting the AHCI command list via toggling PxCMD.ST from '1' to '0' and back. This allows the driver a chance to recover if for instance a timeout occurred due to activity on the host.
|
#
272388 |
|
01-Oct-2014 |
grehan |
MFC r272193
Allow the PIC's IMR register to be read before ICW initialisation.
As of git submit e179f6914152eca9, the Linux kernel does a simple probe of the PIC by writing a pattern to the IMR and then reading it back, prior to the init sequence of ICW words.
The bhyve PIC emulation wasn't allowing the IMR to be read until the ICW sequence was complete. This limitation isn't required so relax the test.
With this change, Linux kernels 3.15-rc2 and later won't hang on boot when calibrating the local APIC.
Approved by: re (gjb)
|
#
270159 |
|
19-Aug-2014 |
grehan |
MFC r267921, r267934, r267949, r267959, r267966, r268202, r268276, r268427, r268428, r268521, r268638, r268639, r268701, r268777, r268889, r268922, r269008, r269042, r269043, r269080, r269094, r269108, r269109, r269281, r269317, r269700, r269896, r269962, r269989.
Catch bhyve up to CURRENT.
Lightly tested with FreeBSD i386/amd64, Linux i386/amd64, and OpenBSD/amd64. Still resolving an issue with OpenBSD/i386.
Many thanks to jhb@ for all the hard work on the prior MFCs !
r267921 - support the "mov r/m8, imm8" instruction r267934 - document options r267949 - set DMI vers/date to fixed values r267959 - doc: sort cmd flags r267966 - EPT misconf post-mortem info r268202 - use correct flag for event index r268276 - 64-bit virtio capability api r268427 - invalidate guest TLB when cr3 is updated, needed for TSS r268428 - identify vcpu's operating mode r268521 - use correct offset in guest logical-to-linear translation r268638 - chs value r268639 - chs fake values r268701 - instr emul operand/address size override prefix support r268777 - emulation for legacy x86 task switching r268889 - nested exception support r268922 - fix INVARIANTS build r269008 - emulate instructions found in the OpenBSD/i386 5.5 kernel r269042 - fix fault injection r269043 - Reduce VMEXIT_RESTARTs in task_switch.c r269080 - fix issues in PUSH emulation r269094 - simplify return values from the inout handlers r269108 - don't return -1 from the push emulation handler r269109 - avoid permanent sleep in vm_handle_hlt() r269281 - list VT-x features in base kernel dmesg r269317 - Mark AHCI fatal errors as not completed r269700 - Support PCI extended config space in bhyve r269896 - Minor cleanup r269962 - use max guest memory when creating IOMMU domain r269989 - fix interrupt mode names
|
#
268972 |
|
22-Jul-2014 |
jhb |
MFC 266125: Implement a PCI interrupt router to route PCI legacy INTx interrupts to the legacy 8259A PICs.
|
#
268891 |
|
19-Jul-2014 |
jhb |
MFC 259942,262274,263035,263054,263211,263744,264179,264324,264468,264631, 264648,264650,264651,266572,267558: Flesh out the AT PIC and 8254 PIT emulations and move them into the kernel.
|
#
263035 |
|
11-Mar-2014 |
tychon |
Replace the userspace atpic stub with a more functional vmm.ko model.
New ioctls VM_ISA_ASSERT_IRQ, VM_ISA_DEASSERT_IRQ and VM_ISA_PULSE_IRQ can be used to manipulate the pic, and optionally the ioapic, pin state.
Reviewed by: jhb, neel Approved by: neel (co-mentor)
|