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285830 |
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23-Jul-2015 |
gjb |
- Copy stable/10@285827 to releng/10.2 in preparation for 10.2-RC1 builds. - Update newvers.sh to reflect RC1. - Update __FreeBSD_version to reflect 10.2. - Update default pkg(8) configuration to use the quarterly branch.[1]
Discussed with: re, portmgr [1] Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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205675 |
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26-Mar-2010 |
neel |
Replace sb_store64()/sb_load64() with mips3_sd()/mips3_ld() respectively.
Obtained from NetBSD.
Suggested by: jmallett@
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205363 |
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20-Mar-2010 |
neel |
Make sure that the registers 'v0' and 'v1' are properly sign-extended when sb_load64() returns.
Some 32-bit arithmetic operations (e.g. subu) have unpredicatable results when operating on 64-bit registers that are not properly sign-extended.
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#
203985 |
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17-Feb-2010 |
neel |
Various fixes to get the SWARM config working on a big-endian Sibyte CPU.
Getting the little-endian PCI bus working on the big-endian CPU proved to be quite challenging. We let the PCI devices be mapped in the "match byte lanes" address window. This is where they are mapped by the CFE and DMA transfers generated to or from addresses within this window are not subject to automatic byte-swapping.
However any access by the driver to memory-mapped pci space is redirected via the "match bit lanes" address window. We get the benefit of automatic byte swapping through this address window and drivers don't need to change to deal with CPU big-endianness.
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203697 |
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09-Feb-2010 |
neel |
SMP support for the mips port.
The platform that supports SMP currently is a SWARM with a dual-core Sibyte processor. The kernel config file to use is SWARM_SMP.
Reviewed by: imp, rrs
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203509 |
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05-Feb-2010 |
neel |
Reimplement all functions to access the system control unit in C.
The only reason we need to have the sb_load64() and sb_store64() functions in assembly is to cheat the compiler and generate the 'ld' and 'sd' instructions which it otherwise will not do when compiling for a 32-bit architecture. There are some 64-bit registers in the SCD unit that must be accessed using 64-bit load and store instructions.
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201905 |
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09-Jan-2010 |
imp |
Merge from projects/mips to head by hand:
Copy the files for the sibyte support (except files in sys/conf and sys/mips/conf). This targets the Broadcom SWARM board (bcm91250) and the SB-1 core in the BCM1250 SoC. This work was done by Neel Natu.
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#
195333 |
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04-Jul-2009 |
imp |
Add sibyte device support.
Submitted by: Neelkanth Natu
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