History log of /freebsd-10.2-release/sys/dev/altera/jtag_uart/altera_jtag_uart_fdt.c
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# 285830 23-Jul-2015 gjb

- Copy stable/10@285827 to releng/10.2 in preparation for 10.2-RC1
builds.
- Update newvers.sh to reflect RC1.
- Update __FreeBSD_version to reflect 10.2.
- Update default pkg(8) configuration to use the quarterly branch.[1]

Discussed with: re, portmgr [1]
Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

# 266152 15-May-2014 ian

MFC r261410

Follow r261352 by updating all drivers which are children of simplebus
to check the status property in their probe routines.


# 256281 10-Oct-2013 gjb

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation


# 245380 13-Jan-2013 rwatson

Merge Perforce changeset 219952 to head:

Make different bus attachments for Altera and Terasice
device drivers share the same devclass_t.

Sponsored by: DARPA, AFRL


# 245365 13-Jan-2013 rwatson

Merge Perforce changeset 219918 to head:

Naive first cut at an FDT bus attachment for the Altera JTAG UART.

Sponsored by: DARPA, AFRL


# 245364 13-Jan-2013 rwatson

Merge Perforce changeset 219917 to head:

Copy Altera JTAG UART nexus bus attachment as a starting point
for an FDT bus attachment.

Sponsored by: DARPA, AFRL


# 239676 25-Aug-2012 rwatson

Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core,
which presents a UART-like interface over the Avalon bus that can be
addressed over JTAG. This IP core proves extremely useful, allowing us to
connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard
and soft cores. As interrupts are optionally configured for this soft
core, we support both interrupt-driven and polled modes of operation,
which must be selected using device.hints. UART instances appear in /dev
as ttyu0, ttyu1, etc.

However, it also contains a number of quirks, which make it difficult to
tell when JTAG is connected, and some buffering issues. We work around
these as best we can, using various heuristics.

While the majority of this device driver is not only not BERI-specific,
but also not MIPS-specific, for now add its defines in the BERI files
list, as the console-level parts are aware of where the first JTAG UART
is mapped on Avalon, and contain MIPS-specific address translation, to
use before Newbus and device.hints are available.

Sponsored by: DARPA, AFRL