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259065 |
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07-Dec-2013 |
gjb |
- Copy stable/10 (r259064) to releng/10.0 as part of the 10.0-RELEASE cycle. - Update __FreeBSD_version [1] - Set branch name to -RC1
[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so start releng/10.0 at '100' so the branch is started with a value ending in zero.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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221271 |
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30-Apr-2011 |
marcel |
Stop linking against a direct-mapped virtual address and instead use the PBVM. This eliminates the implied hardcoding of the physical address at which the kernel needs to be loaded. Using the PBVM makes it possible to load the kernel irrespective of the physical memory organization and allows us to replicate kernel text on NUMA machines.
While here, reduce the direct-mapped page size to the kernel's page size so that we can support memory attributes better.
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205234 |
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16-Mar-2010 |
marcel |
Revamp the interrupt code based on the previous commit: o Introduce XIV, eXternal Interrupt Vector, to differentiate from the interrupts vectors that are offsets in the IVT (Interrupt Vector Table). There's a vector for external interrupts, which are based on the XIVs.
o Keep track of allocated and reserved XIVs so that we can assign XIVs without hardcoding anything. When XIVs are allocated, an interrupt handler and a class is specified for the XIV. Classes are: 1. architecture-defined: XIV 15 is returned when no external interrupt are pending, 2. platform-defined: SAL reports which XIV is used to wakeup an AP (typically 0xFF, but it's 0x12 for the Altix 350). 3. inter-processor interrupts: allocated for SMP support and non-redirectable. 4. device interrupts (i.e. IRQs): allocated when devices are discovered and are redirectable.
o Rewrite the central interrupt handler to call the per-XIV interrupt handler and rename it to ia64_handle_intr(). Move the per-XIV handler implementation to the file where we have the XIV allocation/reservation. Clock interrupt handling is moved to clock.c. IPI handling is moved to mp_machdep.c.
o Drop support for the Intel 8259A because it was broken. When XIV 0 is received, the CPU should initiate an INTA cycle to obtain the interrupt vector of the 8259-based interrupt. In these cases the interrupt controller we should be talking to WRT to masking on signalling EOI is the 8259 and not the I/O SAPIC. This requires adriver for the Intel 8259A which isn't available for ia64. Thus stop pretending to support ExtINTs and instead panic() so that if we come across hardware that has an Intel 8259A, so have something real to work with.
o With XIVs for IPIs dynamically allocatedi and also based on priority, define the IPI_* symbols as variables rather than constants. The variable holds the XIV allocated for the IPI.
o IPI_STOP_HARD delivers a NMI if possible. Otherwise the XIV assigned to IPI_STOP is delivered.
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183439 |
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28-Sep-2008 |
marius |
Remove ipi_all() and ipi_self() as the former hasn't been used at all to date and the latter also is only used in ia64 and powerpc code which no longer serves a real purpose after bring-up and just can be removed as well. Note that architectures like sun4u also provide no means of implementing IPI'ing a CPU itself natively in the first place.
Suggested by: jhb Reviewed by: arch, grehan, jhb
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183299 |
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23-Sep-2008 |
obrien |
The kernel implemented 'memcmp' is an alias for 'bcmp'. However, memcmp and bcmp are not the same thing. 'man bcmp' states that the return is "non-zero" if the two byte strings are not identical. Where as, 'man memcmp' states that the return is the "difference between the first two differing bytes (treated as unsigned char values" if the two byte strings are not identical.
So provide a proper memcmp(9), but it is a C implementation not a tuned assembly implementation. Therefore bcmp(9) should be preferred over memcmp(9).
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149036 |
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13-Aug-2005 |
marcel |
Fix the problem with the IPI for the lazy context switching of the high FP registers. It was not that the IPI got lost due to the perceived unreliability of the IPI delivery, but rather that the IPI was not assigned a vector (ugh). Sending a 0 vector to a CPU results in a stray external interrupt. Add a KASSERT to ipi_send() to catch this. The initialization of the IPIs could be better, but it's not at all sure what the future of the code is. Avoid wasting a lot of time on something that is going to be rewritten anyway.
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135453 |
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19-Sep-2004 |
marcel |
MFp4: Completely remove the remaining EFI includes and add our own (type) definitions instead. While here, abstract more of the internals by providing interface functions.
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132626 |
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25-Jul-2004 |
marcel |
Work-around a gcc code generation bug for function descriptors references (target/16559). This fixes SMP configurations.
Obtained from: arun@
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110211 |
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01-Feb-2003 |
marcel |
Remove special casing for running in the simulator from the kernel and instead add platform, firmware and EFI stubs to the loader. The net effect of this change is that besides a special console and disk driver, the kernel has no knowledge of the simulator. This has the following advantages: o Simulator support is much harder to break, o It's easier to make use of more feature complete simulators. This would only need a change in the simulator specific loader, o Running SMP kernels within the simulator. Note that ski at this time does not simulate IPIs, so there's no way to start APs.
The platform, firmware and EFI stubs describe the following hardware: o 4 CPU Itanium, o 128 MB RAM within the 4GB address space, o 64 MB RAM above the 4GB address space.
NOTE: The stubs in the skiloader describe a machine that should in parts be defined by the simulator. Things like processor interrupt block and AP wakeup vector cannot be choosen at random because they require interpretation by the simulator. Currently the simulator is ignorant of this.
This change introduces an unofficial SSC call SSC_SAL_SET_VECTORS which is ignored by the simulator.
Tested with: ski (version 0.943 for linux)
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102560 |
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29-Aug-2002 |
jake |
Fixed printf format errors.
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96442 |
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12-May-2002 |
marcel |
o Rename ia64_count_aps to ia64_count_cpus and reimplement the function to return the total number of CPUs and not the highest CPU id. o Define mp_maxid based on the minimum of the actual number of CPUs in the system and MAXCPU. o In cpu_mp_add, when the CPU id of the CPU we're trying to add is larger than mp_maxid, don't add the CPU. Formerly this was based on MAXCPU. Don't count CPUs when we add them. We already know how many CPUs exist. o Replace MAXCPU with mp_maxid when used in loops that iterate over the id space. This avoids a couple of useless iterations. o In cpu_mp_unleash, use the number of CPUs to determine if we need to launch the CPUs. o Remove mp_hardware as it's not used anymore. o Move the IPI vector array from mp_machdep.c to sal.c. We use the array as a centralized place to collect vector assignments. Note that we still assign vectors to SMP specific IPIs in non-SMP configurations. Rename the array from mp_ipi_vector to ipi_vector. o Add IPI_MCA_RENDEZ and IPI_MCA_CMCV. These are used by MCA. Note that IPI_MCA_CMCV is not SMP specific. o Initialize the ipi_vector array so that we place the IPIs in sensible priority classes. The classes are relative to where the AP wake-up vector is located to guarantee that it's the highest priority (external) interrupt. Class assignment is as follows: class IPI notes x AP wake-up (normally x=15) x-1 MCA rendezvous x-2 AST, Rendezvous, stop x-3 CMCV, test
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96061 |
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05-May-2002 |
marcel |
o Include md_var.h o Remove definition of struct ia64_fdesc o Remove prototype of os_boot_rendez o Use the FDESC_FUNC and FDESC_GP abstractions
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95518 |
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26-Apr-2002 |
marcel |
MCA specific code has been moved to a seperate file. It is expected to grow enough to be in the way here.
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95245 |
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22-Apr-2002 |
marcel |
Add ia64_sal_init_state(). This function will initialize the machine check handling. In its current form, it only determines the largest amount of state information it can get from SAL and allocates a region 7 memory block for it.
The next steps involve: o get and log any unconsumed (NVM stored) error records across reboots, o register an OS_MCA handler and enable machine checks.
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92672 |
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19-Mar-2002 |
peter |
#ifdef SMP some variables that are only used elsewhere under #ifdef SMP also.
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86069 |
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05-Nov-2001 |
marcel |
Don't pass os_boot_rendez directly to SAL_SET_VECTORS, because it's actually the address of the function descriptor. The fdesc has both the address of the function and it's corresponding gp value. Now that we have a gp value, use it instead of passing 0.
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85684 |
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29-Oct-2001 |
dfr |
Make the various bits of SMP code conditional on SMP so that I can still build non-SMP kernels.
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85656 |
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29-Oct-2001 |
marcel |
o Do not parse the MADT as a side-effect in AcpiOsGetRootPointer, do it as a side-effect of probing for MP hardware. This allows us to scan for local SAPICs early (especially before MBUF initialization). o Fix the Local SAPIC structure so that matches the Local SAPIC table entry. Now that the Local SAPIC info is the same as the Local APIC info, stop dumping the Local APIC entries. o For every Local SAPIC entry in the MADT that's not disabled, let the SMP code know about it. They represent actual CPUs. o Register the OS_BOOT_RENDEZ entry point and provide a (bogus) implementation for the entry point. o Provide a mapping for internal IPI numbers to ExtINT vectors. o In a MP system, announce the CPUs and start them by sending IPI_AP_WAKEUP to each of them. Not that it makes a difference at this time :-) o Miscellaneous style fixes and other adjustments.
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85211 |
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20-Oct-2001 |
marcel |
Save the AP wake-up vector from the SAL descriptor under SMP. Note that the descriptor is optional. Add a comment to indicate that we want to register the OS_BOOT_RENDEZ here as well.
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84121 |
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29-Sep-2001 |
dfr |
Add code to initialise firmware resources (and to fake them if we are running in simulation).
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