- Copy stable/10 (r259064) to releng/10.0 as part of the
10.0-RELEASE cycle.
- Update __FreeBSD_version [1]
- Set branch name to -RC1

[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so
start releng/10.0 at '100' so the branch is started with
a value ending in zero.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Remove all legacy ATA code parts, not used since options ATA_CAM enabled in
most kernels before FreeBSD 9.0. Remove such modules and respective kernel
options: atadisk, ataraid, atapicd, atapifd, atapist, atapicam. Remove the
atacontrol utility and some man pages. Remove useless now options ATA_CAM.

No objections: current@, stable@
MFC after: never

Fix command timeout caused by data underrun during fetching ATAPI sense
data, introduced by r246713. There are two places where ata_request is
filled in ATA_CAM: ata_cam_begin_transaction() and ata_cam_request_sense().
In the first case DMA should be done for addresses from the CCB. In second
case, DMA should be done to the different address, the address of the sense
buffer inside the CCB structure itself.

Reform the busdma API so that new types may be added without modifying
every architecture's busdma_machdep.c. It is done by unifying the
bus_dmamap_load_buffer() routines so that they may be called from MI
code. The MD busdma is then given a chance to do any final processing
in the complete() callback.

The cam changes unify the bus_dmamap_load* handling in cam drivers.

The arm and mips implementations are updated to track virtual
addresses for sync(). Previously this was done in a type specific
way. Now it is done in a generic way by recording the list of
virtuals in the map.

Submitted by: jeff (sponsored by EMC/Isilon)
Reviewed by: kan (previous version), scottl,
mjacob (isp(4), no objections for target mode changes)
Discussed with: ian (arm changes)
Tested by: marius (sparc64), mips (jmallet), isci(4) on x86 (jharris),
amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)

Convert files to UTF-8

- Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after: 2 weeks

Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by: mav
MFC after: 1 month

MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by: nwitehorn (powerpc part)

MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.

Remove constraint, requiring request data to fulfill controller's alignment
requirements. It is busdma task, to manage proper alignment by loading
data to bounce buffers.

PR: kern/127316
Reviewed by: current@
Tested by: Ryan Rogers

Move non-PCI prototypes from ata-pci.h -> ata-all.h.

This removes unnecessary PCI #includes dependency for systems with ATA
controllers living at non-PCI buses.

Submitted by: Piotr Ziecik
Obtained from: Semihalf

Quite mechanical ch_detach implementations for all atapci subdrivers.
Some dmainit call fixes for previous commit.

Restore the default maximum segment size for the bus dma tag to 64k as it
is in 6.x and 7.x. The typo caused 64k transactions to be unnecessarily
split up into two PRD entries.

This is the roumored ATA modulerisation works, and it needs a little explanation.

If you just config KERNEL as usual there should be no apparent changes, you'll get all chipset support code compiled in.

However there is now a way to only compile in code for chipsets needed on a pr vendor basis. ATA now has the following "device" entries:

atacore: ATA core functionality, always needed for any ATA setup

atacard: CARDBUS support
atacbus: PC98 cbus support
ataisa: ISA bus support
atapci: PCI bus support only generic chipset support.

ataahci: AHCI support, also pulled in by some vendor modules.

ataacard, ataacerlabs, ataadaptec, ataamd, ataati, atacenatek, atacypress, atacyrix, atahighpoint, ataintel, ataite, atajmicron, atamarvell, atamicron, atanational, atanetcell, atanvidia, atapromise, ataserverworks, atasiliconimage, atasis, atavia; Vendor support, ie atavia for VIA chipsets

atadisk: ATA disk driver
ataraid: ATA softraid driver

atapicd: ATAPI cd/dvd driver
atapifd: ATAPI floppy/flashdisk driver
atapist: ATAPI tape driver

atausb: ATA<>USB bridge
atapicam: ATA<>CAM bridge

This makes it possible to config a kernel with just VIA chipset support by having the following ATA lines in the kernel config file:

device atacore
device atapci
device atavia

And then you need the atadisk, atapicd etc lines in there just as usual.

If you use ATA as modules loaded at boot there is few changes except the rename of the "ata" module to "atacore", things looks just as usual.
However under atapci you now have a whole bunch of vendor specific drivers, that you can kldload individually depending on you needs. Drivers have the same names as used in the kernel config explained above.

Fix the breakage that caused AHCI devices to vanish. Editor droppings :(

Put the ATAPI device numbering back to the old ways.

Alloc two DMA slots pr default, silly me forgot that slaves still exists.

Go back to preallocating everything possible on init.
This avoids calling busdma in the request processing path which caused a traumatic performance degradation.
Allocation has be postponed to after we know how many devices we possible can have on portmulitpliers to save some space.

Fix problem with slave devices.
Fix or rather bring ENOMEM problems back to the state it was before.
Temporarily disable PortMultipliers on AHCI devices.

Fix the brokenness in the former commit, sorry for the mess.
The problem is that the PM support is part of a much larger WIP here, but due to popular demand I decided to get some of it imported.

Also I forgot the mention:

HW sponsored by: Vitsch Electronics / VEHosting

Add experimental support for SATA Port Multipliers

Support is working on the Silicon Image SiI3124/3132.
Support is working on some AHCI chips but far from all.

Remember this is WIP, so test reports and (constructive) suggestions are welcome!

Implement a workaround of the datacorruption problem on serverworks HT1000 chipsets.
The HT1000 DMA engine seems to not always like 64K transfers and sometimes barfs data all over memory leading to instant chrash and burn.
Also fix 48bit adressing issues, apparently newer chips needs 16bit writes and not the usual fifo thing.

HW donated by: Travis Mikalson at TerraNovaNet

Fix KASSERT messages.

Try to workaound silicon bugs in Promise gen2 (ie TX4) chips

Initial patch by Alexander Sabourenkov who found it in Promise's own driver.

Further fixes and sanity checks by yours truely.

OK, this is not my day, fix the former fix :/

Hopefully unbreak the 64bit DMA support this time.

Dont zero out 64BIT flag on DMA ops.

Add support for 64bit addressing to AHCI and Marvell controllers.
Munged into ATA shape and Marvell specifics my yours truely.

Submitted by: jhb

Update copyright headers.

add a newbus method for obtaining the bus's bus_dma_tag_t... This is
required by arches like sparc64 (not yet implemented) and sun4v where there
are seperate IOMMU's for each PCI bus... For all other arches, it will
end up returning NULL, which makes it a no-op...

Convert a few drivers (the ones we've been working w/ on sun4v) to the
new convection... Eventually all drivers will need to replace the parent
tag of NULL, w/ bus_get_dma_tag(dev), though dev is usually different for
each driver, and will require hand inspection...

Reviewed by: scottl (earlier version)

Get rid of the advertising clause in the copyright.

Dont use the BUS_DMA_ALLOCNOW flag. Instead use BUS_DMA_NOWAIT and return
ENOMEM to the upper layers if we run out of memory.

This solves part of the trouble with running on >4GB memory systems.

Normalize a significant number of kernel malloc type names:

- Prefer '_' to ' ', as it results in more easily parsed results in
memory monitoring tools such as vmstat.

- Remove punctuation that is incompatible with using memory type names
as file names, such as '/' characters.

- Disambiguate some collisions by adding subsystem prefixes to some
memory types.

- Generally prefer lower case to upper case.

- If the same type is defined in multiple architecture directories,
attempt to use the same name in additional cases.

Not all instances were caught in this change, so more work is required to
finish this conversion. Similar changes are required for UMA zone names.

Add support for setting the SG list segment size.
Use this for the SiI3112 workaround to get rid of the "oversized DMA" errors.

MFC to 6.0 candidate.

Reshape the dma code to be a bit more flexible so it can cope with
new HW that has new and different demands.
Fix a few nits in former commit in this cleanup crusade.

Sponsored by: pair.com

Update on the last commit, the dma* funciton needs to be called with
a channel device, not an ata device, or we'll be out of luck in
reset/timeout where we dont have a device.

Take newbusification one step further, ie use the device_t more consequently
all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.

Sponsored by: pair.com

Put the BUS_DMASYNC_PREWRITE in the rigth position.

This is the much rumoured ATA mkIII update that I've been working on.

o ATA is now fully newbus'd and split into modules.
This means that on a modern system you just load "atapci and ata"
to get the base support, and then one or more of the device
subdrivers "atadisk atapicd atapifd atapist ataraid".
All can be loaded/unloaded anytime, but for obvious reasons you
dont want to unload atadisk when you have mounted filesystems.

o The device identify part of the probe has been rewritten to fix
the problems with odd devices the old had, and to try to remove
so of the long delays some HW could provoke. Also probing is done
without the need for interrupts, making earlier probing possible.

o SATA devices can be hot inserted/removed and devices will be created/
removed in /dev accordingly.
NOTE: only supported on controllers that has this feature:
Promise and Silicon Image for now.
On other controllers the usual atacontrol detach/attach dance is
still needed.

o Support for "atomic" composite ATA requests used for RAID.

o ATA RAID support has been rewritten and and now supports these
metadata formats:
"Adaptec HostRAID"
"Highpoint V2 RocketRAID"
"Highpoint V3 RocketRAID"
"Intel MatrixRAID"
"Integrated Technology Express"
"LSILogic V2 MegaRAID"
"LSILogic V3 MegaRAID"
"Promise FastTrak"
"Silicon Image Medley"
"FreeBSD PseudoRAID"

o Update the ioctl API to match new RAID levels etc.

o Update atacontrol to know about the new RAID levels etc
NOTE: you need to recompile atacontrol with the new sys/ata.h,
make world will take care of that.
NOTE2: that rebuild is done differently from the old system as
the rebuild is now done piggybacked on read requests to the
array, so atacontrol simply starts a background "dd" to rebuild
the array.

o The reinit code has been worked over to be much more robust.

o The timeout code has been overhauled for races.

o Support of new chipsets.

o Lots of fixes for bugs found while doing the modulerization and
reviewing the old code.

Missing or changed features from current ATA:

o atapi-cd no longer has support for ATAPI changers. Todays its
much cheaper and alot faster to copy those CD images to disk
and serve them from there. Besides they dont seem to be made
anymore, maybe for that exact reason.

o ATA RAID can only read metadata from all the above metadata formats,
not write all of them (Promise and Highpoint V2 so far). This means
that arrays can be picked up from the BIOS, but they cannot be
created from FreeBSD. There is more to it than just the missing
write metadata support, those formats are not unique to a given
controller like Promise and Highpoint formats, instead they exist
for several types, and even worse, some controllers can have
different formats and its impossible to tell which one.
The outcome is that we cannot reliably create the metadata of those
formats and be sure the controller BIOS will understand it.
However write support is needed to update/fail/rebuild the arrays
properly so it sits fairly high on the TODO list.

o So far atapicam is not supported with these changes. When/if this
will change is up to the maintainer of atapi-cam so go there for
questions.

HW donated by: Webveveriet AS
HW donated by: Frode Nordahl
HW donated by: Yahoo!
HW donated by: Sentex
Patience by: Vife and my boys (and even the cats)

Don't set the BUS_DMA_ALLOCNOW flag for the parent tag or the tags that are
used for static memory allocations.

Discussed with: sos

Reduce the amount of memory reported to busdma.
This made the requirements for bouncebuffers too big with PAE.
Cleanup the way size defines for transfers are implemented.

Correct the args to busdma, mostly cosmetic.

Allow the use of a supplied function to set the PRD table. This is
needed for new chips that supports 64bit addressing.

Change the order of ata_dmainit/ata_allocate in preparation of
supporting new chipsets where this is needed.

Try to narrow down the race window on HW that does not have ways to
poll for which channel actually pulled the irq line.

Add support for the Promise command sequencer present on all modern Promise
controllers (PDC203** PDC206**).

This also adds preliminary support for the Promise SX4/SX4000 but *only*
as a "normal" Promise ATA controller (ATA RAID's are supported though
but only RAID0, RAID1 and RAID0+1).

This cuts off yet another 5-8% of the command overhead on promise controllers,
making them the fastest we have ever had support for.

Work is now continuing to add support for this in ATA RAID, to accellerate
ATA RAID quite a bit on these controllers, and especially the SX4/SX4000
series as they have quite a few tricks in there..

This commit also adds a few fixes to the SATA code needed for proper support.

Use UMA instead of plain malloc for getting ATA request storage.
This gives +10% performance on simple tests, so definitly worth it.
A few percent more could be had by not using M_ZERO'd alloc's, but
we then need to clear fields all over the place to be safe, and
that was deemed not worth the trouble (and it makes life dangerous).

Overhaul of the timeout/reinit framework. This should clear up most
of the leftovers from the old version that really doesn't work anymore.

Add a reset function for host-end of the ATA channel. This is needed
for the SiI3112 in order to whack it back to reality if a device
locks up the SATA interface (thereby preventing that we can reset the
device). The result is that ATA now recovers from the timeouts that
happens with the SiI3112A and more or less all disks based on old
PATA electronics with a Marvell PATA->SATA converter. This includes
lots of the popular SATA dongles and the WDC Raptor disks..

Workaround for errata on early versions of the sii3112.

Approved by: re@

Fix the DMA problem that most severely hit on the DS3112a SATA chip
in connection with Marvell based SATA->PATA dongles.

The problem was caused by a combination of things working
together to make it hard to spot...

The ATA driver has always started the ATA command, then build
the SG list for DMA and then finally started the DMA engine.
While this is according to specs, it poses a potential
problem as some controllers apparently do not allow for unlimitted
time between starting the ATA command and starting the DMA engine.

At about the same time as ATAng was committed there were lots
of other changes applied, some of which was locking in parts
that causes the busdma load functions to take significantly
longer to load the SG list.

This pushed the time spent between starting the ATA command and
starting the DMA engine over the hill for some controllers
(especially the Silicon Image DS3112a) and caused what looked
like lost interrupts.

The solution is to get all the SG list work or rather all
busdma related stuff done before we even try to start anything.

This has the nice side effect of seperating busdma out the
way it should be, so the working of the ATA machinery is not
cluttered up with busdma droppings, making the code easier
to read and understand.

Give more correct params to busdma_*

Cleanup the dma int/alloc/free code.

Use __FBSDID().
Also some minor style cleanups.

This is a major rework of the ATA driver (ATAng)

Restructure the way ATA/ATAPI commands are processed, use a common
ata_request structure for both. This centralises the way requests
are handled so locking is much easier to handle.

The driver is now layered much more cleanly to seperate the lowlevel
HW access so it can be tailored to specific controllers without touching
the upper layers. This is needed to support some of the newer
semi-intelligent ATA controllers showing up.

The top level drivers (disk, ATAPI devices) are more or less still
the same with just corrections to use the new interface.

Pull ATA out from under Gaint now that locking can be done in a sane way.

Add support for a the National Geode SC1100. Thanks to Soekris engineering
for sponsoring a Soekris 4801 to make this support.

Fixed alot of small bugs in the chipset code for various chips now
we are around in that corner anyways.

Prefer new location of pci include files (which have only been in the
tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.

Mega busdma API commit.

Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg.
Lockfunc allows a driver to provide a function for managing its locking
semantics while using busdma. At the moment, this is used for the
asynchronous busdma_swi and callback mechanism. Two lockfunc implementations
are provided: busdma_lock_mutex() performs standard mutex operations on the
mutex that is specified from lockfuncarg. dftl_lock() is a panic
implementation and is defaulted to when NULL, NULL are passed to
bus_dma_tag_create(). The only time that NULL, NULL should ever be used is
when the driver ensures that bus_dmamap_load() will not be deferred.
Drivers that do not provide their own locking can pass
busdma_lock_mutex,&Giant args in order to preserve the former behaviour.

sparc64 and powerpc do not provide real busdma_swi functions, so this is
largely a noop on those platforms. The busdma_swi on is64 is not properly
locked yet, so warnings will be emitted on this platform when busdma
callback deferrals happen.

If anyone gets panics or warnings from dflt_lock() being called, please
let me know right away.

Reviewed by: tmm, gibbs

Third round of updates to the ATA driver.

More DMA cleanups, including fix for breakage on older Promise controllers.

Add more ways of getting to the ATA registers.

Second round of updates to the ATA driver.

Clean up the DMA interface too much unneeded stuff crept in with
the busdma code back when.

Modify the ATA_IN* / ATA_OUT* macros so that resource and offset
are gotten from a table. That allows for new chipsets that doesn't
nessesarily have things ordered the good old way. This also removes
the need for the wierd PC98 resource functions.

Tested on: i386, PC98, Alpha, Sparc64

First round off updates/fixes to the ATA driver.

This moves all chipset specific code to a new file 'ata-chipset.c'.
Extensive use of tables and pointers to avoid having the same switch
on chipset type in several places, and to allow substituting various
functions for different HW arch needs.
Added PIO mode setup and all DMA modes.
Support for all known SiS chipsets. Thanks to Christoph Kukulies for
sponsoring a nice ASUS P4S8X SiS648 based board for this work!

Tested on: i386, PC98, alpha and sparc64

Small change to the previous commit, zero out the 48BIT flag in ata_command
instead of in dmadone.

Add support for the ServerWorks CSB6.
The support for the 3'rd channel is only experimental.

Fix the 48bit access support for the older Promise 66/100 controllers, the
first attempt was wrong and could cause r/w timeouts.

Add yet another Promise PCI id.

Fix typo

PR: 45375

Add support for the nVidia nForce2 ATA part.

Fix support for the nForce1 as well, registers are offset 0x10
against the AMD/VIA parts.

Add code that works around the problem that the older Promise
controllers (ultra/fasttrak-66/100) fails on 48bit accesses.

Add support for the PC98 platform to the ATA driver.
This mostly consists of functionality to serialize accesses to
the two ATA channels (which can also be used to "fix" certain
PCI based controllers).
Add support for Acard controllers.
Enable the ATA driver in PC98 GENERIC, and add device hints.
Update man page with latest support.

The PC98 core team has kindly provided me with a PC98
machine that made this all possible, thanks to all that
contributed to that effort, without that this would
probably newer have been possible..

Approved by: re@

Add yet another Promise PCI id.

Remove unused #includes: <sys/disk.h> <sys/devicestat.h> and <sys/sysctl.h>

Sponsored by: DARPA & NAI Labs.
Approved by: sos

Add support for the VIA 8235.

Submitted by: Jason Dambrosio <jason@wiz.cx>

remove #includes of <sys/bio.h> where not needed.

Add preliminary mostly untested support for the Silicon Image Sil680 chip.

Add PCI ID for the ICH4 ATA100 controller.

Sponsored by: The Weather Channel

Add yet another (older) Promise chip

Move the new byte order function prototypes from <sys/param.h> to
<sys/endian.h>. This puts us in line with NetBSD and OpenBSD.

Fix the breakage of tagged queueing that the busdma integration
introduced. Since its now only possible to have one DMA control
block at a time, we move the setup to dmastart instead.

Add support for the nVIDIA nForce ATA controller.

Collapse the VIA/AMD/nVIDIA support code into one, they are
created more or less equal anyway..

Add yet another chip ID for a Promise TX2 chip.

Add yet another ATA133 Promise chip.

Make the ATA driver compile & work on the sparc64 platform.

Initial work & code by tmm.

Lots of changes and rearrangements by yours truely to make busdma
be a little less a PITA (but I still dont like it).

Correct the Northbridge test on the new ATA133 VIA's
Misc cosmetics now I'm there.

ATA100 is allowed on the HPT chips rev >= 3

Add AMD 768 support.

Add support for the ServerWorks CSB5 chips

Even more Highpoint RAID support.

Fix the 80pin cable detection system.

Misc little cleanups:

Link if only ATAPI device in kernel config
Remove unused #includes
Rearrange a bit in ata-raid to make diff against -stable smaller
Enable wc as default again, dunne how this happend...

Major update of the ATA RAID code, part 3:

Add code to properly detach/attach disks that are part of a RAID.

Mark a disk that is attached on an ATA channel belonging to a
RAID as a spare disk that can be used for rebuilding failed RAID1's.

Add support for rebuilding failed RAID1's.

Several fixes to the detach/attach code.

For replacing a disk in a failed RAID1 do the following:

Find the controller channel# of the failed disk.

Exec 'atacontrol detach <channel#>' to free the disk from the system.

Replace the failed disk with a new one of at least the same size.
If your have your disks in drawers/enclosures this can be done with
the system still running.

Exec 'atacontrol attach <channel#>' to add the disk to the system and
mark it as a valid spare for rebuild.

Exec 'atacontrol rebuild <array#>'

The system will rebuild the array on the fly, the array can still
be used during this, although with slower performance.

Please let me know of any problems with this!

Sponsored by: Advanis Inc.

MFC after: 2 weeks

Add support for the Highpoint HPT372 based cards (rocketraid 133).

HW Sponsored by: Mike Tancsa

Add support for the Cenatek Rocket Drive.

Add support for the HighPoint HPT374 4 channel ATA chip.

Sponsored by: Isilon Systems.

Major update of the ATA RAID code, part 1:

Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.

A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.

Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.

Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.

Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.

If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.

Misc fixes that I had lying around for various minor bugs.

Sponsored by: Advanis Inc.

Add support for the Promise TX4.

Rearrange the support for the VIA chips, and add experimental
support for ATA133 on the newest chips.

Add support for even more SiS chipsets.

Misc cosmetics.

Fix comment for the SiS 645 chipset to be 645 instead of 635.

Adjust the timings for the SiS chips a bit, also add the SiS 645.

Cosmetics on the Acer chips (print right modes)

Initial support for the newer SiS chipsets, based on docs we finally
got from SiS.

This should also close PR 32421 which has patches which seem
to set the timing registers wrongly according to SiS...

Add yet another VIA ATA100 southbridge.

Add a bunch of new PCI ID's for Intel ATA chips.

Add experimental support for the HighPoint HPT372 ATA133 controller.

Based on docs kindly provided by HighPoint which we thank for
the close cooperation with the FreeBSD project!.

Add experimental support for the Promise ATA133 controller.

This might need additional code for hotswapping use, but first
I need to get my hands on actual hw...

Based on docs kindly provided by Promise Inc which we thank for
the close cooperation with the FreeBSD project!.

Update with latest ATA/ATAPI ver 6 rev 2 items.

Doh! committed from the wrong tree, this is the right "stuff"...

Proberly support the Promise TX2/4.

Programming info kindly provided by Daniela Engert <dani@ngrt.de>

Overhaul to minimize stack usage, in some places >2K was used
on the stack *blush*...

Update the Promise TX2 code to DTRT and not what I guessed earlier.
Allow tagged queing on the Promise TX2 as it seems to work.

Cudos to promise for making the most simple to program ATA chip.

Add support for yet another VIA '686 combination.

Finally commit some of the minor things I've collected over the last month(s):

Add tagged queueing support for new IBM drives.

Add support for Yet Another Promise ATA 100 chip.

Flush disk cache on close.

Dont flush the disk cache on BIO_ORDERED anymore.

Cleanup the tests for DMA on ATAPI devices.

Allow to share ALL irq's even the std irg 14 & 15.

Fix calculation bug in end of media code on CD's.

Add REZERO on opening a CDR/CDRW.

Cleanup ataioctl a bit.

Add support for yet another Promise ATA100 variant

Minor fix to the VIA setup code.

Add support for the AMD 766 southbridge incl ATA100 support

Fix ATA66 mode for the AMD756, the timing was way to slow

Add support the the Intel ICH2 mobile

Tidy chip name printing a bit.

The VIA 586 chip does UDMA from rev 0x3 onwards.

MFC candidate!

Add ATA66 and ATA100 mode support for Acer chipsets.

MFC candidate :)

Provide the interface to atacontrol and associated logic.

see atacontrol(8) for more.

Also the ATA_ENABLE_ATAPI_DMA, ATA_ENABLE_WC and ATA_ENABLE_TAGS
options are gone, use the tuneables listed in ata.4 instead from
the loader (this makes it possible to switch off DMA before the
driver has to touch the devices on broken hardware).

Split out the ata probes in seperate files for each bus type.

Introduce busspace instead of the good old in/out instructions.
Not pretty but it works (I hope)...

Correct botchup in last commit that made older VIA chips fail...

Add first cut support for the ATA100 capable VIA82c686b.

Add session argument to *close_disk, allowing to set session type on fixate.
Add support for different blank/erase types.

Update headers.

Try better this time at a patch that properly backspeeds on the Acer chips.

Oops the test in the Acer code should be >= not >.

Proberly back down DMA modes on the Acer Aladdin.

Fix warning in the ISA only case.

Fix ISA only systems.

Get rid of the ivars entirely.

Only allow UDMA2 mode on SiS rev > 0xc1

Minor cosmetics

Add support for ServerWorks ROSB4 ATA33 chipset.

Add support for CMD 648 ATA66 & CMD 649 ATA100 chipsets.

Fix the "resource already allocated" panic with the CMD and other
braindead controllers.

Add options ATA_ENABLE_TAGS, without this option tagged queuing will
not be attempted.

Fix the breakage that snatched the ioports from the fdc device.

Fix promise support.

Remove unneeded includes

Pointed out by: phk

Add support for tagged queuing on ATA drives. There is only support for
IBM's DPTA and DTLA series of drives (no other disk vendors are known
to support this) on non-Promise controllers (promise controllers lockup
when given the tagged queuing specific commands).
It gives especially master/slave comboes about 5% better performance.

Add support for the Promise ATA100 OEM chip (pdc20265)

Add support for the Cyrix 5530

Change the way status is read from the drives, use the alternate
status reg when possible.

Better support for DEVFS, the acdXtY devices are now created when needed.

Lots of little cleanups.

* Completely rewrite the alpha busspace to hide the implementation from
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
which call busspace.
* Rework pci config accesses to route through the pcib device instead of
calling a MD function directly.

With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.

Rearrange the probe a bit, hopefully this will help to eleminate
some of the fake devices sometimes seen on single device ATA
channels.

Proberly fail on failures in ata-disk.c, retry instead of hang.

Cleanup the VIA probe/init code a bit.

Fix a couble of missing free's in atapi-cd.c in the changer code.

Fix the ICH2 ATA100 support, and proberly downgrade the chip setup when
going to slower DMA modes on all Intel chips.

Add experimental code for ATA100 support on:

Promise Ultra100 / Fasttrak100
HighPoint HPT370 controllers (fx Abit KA7-100 onboard ctrl, Abit HotRod 100)
Intel ICH2 (Intel 815E based motherboards)

So far I can read >90MB/s on the Promise and the HPT370.
I can write >64MB/s on the promise and >50MB/s on the HPT370 so it seems
writing is still done in ATA66 mode :(
The ICH2 support is untested as of yet...

Spell the word 'limited' with only one 't'.

Fix a nasty bug in ata_intr, parens are a good thing if used right.

Make the error recovery code a little more obvious.

Inform the user if UDMA66 mode couldn't be selected due to a
non ATA66 compliant 80pin cable.

Minor cosmetics.

Separate the struct bio related stuff out of <sys/buf.h> into
<sys/bio.h>.

<sys/bio.h> is now a prerequisite for <sys/buf.h> but it shall
not be made a nested include according to bdes teachings on the
subject of nested includes.

Diskdrivers and similar stuff below specfs::strategy() should no
longer need to include <sys/buf.> unless they need caching of data.

Still a few bogus uses of struct buf to track down.

Repocopy by: peter

Add support for ATA66 on newer revisions of the VIA 82C596

Fix the CD driver so that the last blocks can be read even if
a blocksize != 2k is used.
Update the timeout code to try fallback to PIO if problems
arise in DMA mode.

Add (partial) support for the Cypress ATA controller.

Call intr_teardown on detach.

Always add non masterdevice from unit 2 upwards.

Update to the pccard code, at least some cards are now working,
more testing to follow.

Add UDMA66 support to the Intel ICH chip.

Submitted by: sakichan@lares.dti.ne.jp

Update the ata driver to take more advantage of newbus, this
was needed to make attach/detach of devices work, which is
needed for the PCCARD support.
(PCCARD support is still not working though, more to come on that)

Support the CMD646 chip which is used on many alphas, sadly only
in WDMA2 mode, as the silicon is broken beyond belief for UDMA modes.

Lots of cosmetic fixes here and there.

Sorry for the size of this megapatchfromhell but it was not
possible otherwise...

newbus patches based on work from: dfr (Doug Rabson)

fix support for shared IRQ's.

fix support for multiple HPT & Promise controllers.

support mixed 33/66 devices on the Promise 66 controllers.

fix the refcount stuff in the atapi drivers.

misc cleanups.

Fix compilation on ISA only setups...

Cleanup the ata_dmainit function a bit.
Also allow BIOS setup DMA on unknown controllers.

Add sysctl oid hw.atamodes to set the transfermodes online.

General cleanup.

Dont be so verbose in the probe, only ONE line printed now, to get more
info boot verbose. Centralise most printf's in ata-all & ata-dma to use
the ata_printf function, it saves alot of codelines.

Repeat the identify command if drive fails the first.

Protect the timeout functions with splbio.

Dont update the transfer details before we are sure the transfer
succeded, this way they are proberly retried on errors.

Move the handling of next_writeable to userland.

Use the READ_CD command to read CD's. That enables us to read _anything_
via the normal read/write interface. This kindof obsoletes the READAUDIO
ioctl, but we keep that for now.

Add support for the Intel 810 chipset (ICH type of chips)

Prober support for the VIA 82C686, I finally got the right datasheet.

Get rid of atapi_wait, merge it into ata_wait.

Avoid a couple of races by using asleep instead of tsleep.

Always use 16bit transfers on ISA systems.

Clear up the atapi_read/write functions.

Add support for VIA 82C596 controller

Better shared irq handeling for Promise & HPT366 controllers

Setup prober PIO mode timings on Promise & HPT366 controllers

Update Copyright headers to be Y2K compliant :)

Yet another cleanup of the VIA code, this time it should work
on all combinations (I hope)...

Add DMA support for the AMD 756 chip (K7 chipset) this is actually the
same as the VIA 82C686 chip (the ATA part that is).

Treat the intel MX chipset PIIX as a PIIX4

Allow UDMA on all disks that say they can handle it.

Cleanup probe printf's a bit

Remove alot of the old #ifdef DEBUG crap.

Have another go at the VIA support, this time use the PCI ID form the
main component in the southbridge chip to determine which VIA chip
we are dealing with.

Try to enable DMA on generic controllers that say they has the
capability, instead of relying on the BIOS to have set it up.

Add DMA support for the SiS 5591 and old PIIX chipsets.

Add a missing DELAY(1) in ata_wait.

Change the info from ad_version, so the ATA version from the disk can
be used to quantify the DAM modes valid for this drive, ie be more
selective with turning DMA on on older disks that should not support it..

Fix the probe for BIOS enabled DMA in the generic case, master/slave
was reversed in the test.

Check the return for ata_command in all cases, and print warnings if
it fails.

Call ata_dmainit with all dmamodes off when falling back to PIO mode,
that should take care of both the Promise & HPT366 controllers not
being able to handle the fallback...

Cleanup the printf's in the drivers, use the prober device name (if
possible) instead of ataN-master/slave.

Try a little harder at the VIA DMA support.
Only use UDMA66 on 82C686 and with prober cable.

Oops, committed the wrong file..

Tidy up the VIA support a bit, make it more generic.

Add DMA support for the VIA 82C586 & 82C686 chips, also rearrange
to fall back to slower speeds if the faster ones fails to probe.

Log and retry request on UDMA CRC errors.

Fix a couple of warnings.

Unbreak ATAPI on the Aladdin chipset, only DMA access worked.

Try to use a 32bit mask on the IO addresses, this fixes the alpha
and hopefully doesn't break on any i386 machines.

Try to enable both read & write cache on disks, they should be as
default, but better be sure..

Fix IRQ allocation bug on controllers using a shared interrupt.

Fix a bug which could cause panics in ad/atapi-interrupt.

Add support for UDMA66 on Promise Ultra/Fasttrak controllers.

Get rid of ATA_IGNORE_INTR, and introduce ATA_WAIT_INTR instead.

Add a delay in the dump routine in ata-disk.c, some controllers
seem to need this. Also dont use the timeout watchdog when dumping.

Disable DMA on ATAPI devices as default, add option ATA_ENABLE_ATAPI_DMA
for those that has HW that works.

Add support for some not-up-to-spec ATAPI devices that returns data
together with completition status on data moving cmd's.

Remove unused include files.

Submitted by: phk

Add support for the HPT366 chip, this is used on the Abit boards and
their HotRod controller and on SIIG PCI ultra DMA controller. These
changes also made lots of the Promise code go away, its all much more
generic this way.

Get rid of atapi_immed_cmd, instead use the queue to move atapi commands
from interrupt context if nessesary, the entire atapi layer has
gotten an overhaul.

Lots of fixes to utililize the new features in subr_disk.c etc, and
get rid of the last biots of softc arrays in the drivers, the
only one left is atadevices which cannot easily go away (yet).

Use our own malloc names, its a lot easier to track memory usage this way.

General cleanup overall.

Support quad & max speeds in wormcontrol.
A bit more general cleanup.

Ten'th update to the new ATA/ATAPI driver:

It been awhile since the last major update, as a benefit there
are some cool things in this one (and new bugs probably :) )...

The ATA driver has grown "real" timeout support for all devices.
This means that it should be possible to get in contact with
(especially) lost ATAPI devices. It also means that the ATA
driver is now usable on notebooks as it will DTRT on resume.

An experimental hack at utilizing the Promise66's at UDMA66 is
in there, but I cant test it. If someone feels like sending
me one, give me a ping.

The ATAPI DMA enableling scheme has been changed, also better DMA
support for the Aladdin chipset has been implemented for ATAPI
devices. Note that the Aladdin apparently only can do DMA reads
on ATAPI devices, and the Promise cant do ATAPI DMA at all.
I have seen problems on some ATAPI devices that should be able
to run in DMA mode, so if you encounter problems with hanging
atapi devices during the probe, or during access, disable DMA
in atapi-all.c, and let me know. It might be nessesary to do this
via a "white list" for known good devices...

The ATAPI CDROM driver can now use eject/close without hanging and
the bug that caused reading beyond the end of a CD has been fixed.
Media change is also handled proberly. DVD drives are identified
and are usable as CDROM devices at least, I dont have the HW to
test this further, see above :).

The ATAPI tape driver has gotten some support for using the DSC
method for not blocking the IDE channel during read/write when
the device has full buffers. It knows about the OnStream DI-30
device, support is not completed yet, but it can function as a
primitive backup medium, without filemarks, and without bad media
handeling. This is because the OnStream device doesn't handle this
(like everybody else) in HW. It also now supports getting/setting
the record position on devices that supports it.

Some rather major cleanups and rearrangements as well (cvs -b diff
is your freind). I'm closing in on declaring this for beta code,
most of the infrastruture is in place by now.

As usual USE AT YOUR OWN RISK!!, this is still alpha level code.
This driver can hose your disk real bad if anything goes wrong, but
now you have been warned :)

But please tell me how it works for you!

Enjoy!

-Søren

$Id$ -> $FreeBSD$

Support DMA on ATAPI devices (finally).

This makes my system use only ~5% CPU on reading 4.5Mbyte/sec
from a CDROM, which before was limitted to 1.8Mbyte/sec due
to 100% CPU load..

Add limitted support for the Promise Ultra/66 controller. Its
only supported upto UDMA33 like the old Promise, but it works
now. More when I have specs ....

Allow chipset drivers to specify the direct-mapped DMA window's mask in
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024

These changes should not affect the i386 port

Reviewed by: Doug Rabson <dfr@nlsystems.com>

Seventh update to the new ATA/ATAPI driver:

Fixed problems:

LS120 drives currupted data.
The workaround for drives not supporting upto 64K transfers
has been reworked. It works now both on LS120 & ZIP drives.

ISA only configs wont compile.
Fixed.

The ATA driver wont share interrupts.
Fixed.

The "unwanted interrupt" warning gave wrong controller.
Another lun<>unit messup from the newbus integration.

Some minor cleanups and rearrangements as well.

As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, again you have been warned :)
Notebook owners should be carefull that their machines dont suspend
as this might cause trouble...

But please tell me how it works for you!

Enjoy!

-Søren

Update to use the new-bus framework. No functional changes.

Mostly done by Doug Rabson, minor fixes by me.

Bring the 'new-bus' to the i386. This extensively changes the way the
i386 platform boots, it is no longer ISA-centric, and is fully dynamic.
Most old drivers compile and run without modification via 'compatability
shims' to enable a smoother transition. eisa, isapnp and pccard* are
not yet using the new resource manager. Once fully converted, all drivers
will be loadable, including PCI and ISA.

(Some other changes appear to have snuck in, including a port of Soren's
ATA driver to the Alpha. Soren, back this out if you need to.)

This is a checkpoint of work-in-progress, but is quite functional.

The bulk of the work was done over the last few years by Doug Rabson and
Garrett Wollman.

Approved by: core

Sixth update to the new ATA/ATAPI driver:

Fixed problems:

Promise controllers was not always set up correctly.
Parantheses are a good thing, fixed.

Some older CDROM's could hang the probe.
Proberly wait for the drive to catch its breath after IDENTIFY.

Some CD writers fails because they dont support rezero.
Rearranged the code to not use rezero.

Warnings now that we use EGCS.
Fixed.

Make ISA only systems compile again..

Fix bug in the Promise code that resultet in PIO always being selected.

Fourth update to the new ATA/ATAPI driver:

Well, better late than newer, but things has been hectic
around here, sorry for the long delay.

DMA support has been added to the ATA disk driver.
This only works on Intel PIIX3/4, Acer Aladdin and Promise controllers.
The promise support works without the BIOS on the board,
and timing modes are set to support up to UDMA speed. This
solves the problems with having more than one promise controller
in the same system.
There is support for "generic" DMA, that might work on other
controllers, but now you have been warned :)
More chipset specific code will come soon, I have to find testers
with the approbiate HW, more on that when I have it ready.

The system now uses its own major numbers, please run MAKEDEV
with the devices you need (ad?, acd?, afd?, ast?).
For now the disk driver will also attach to the old wd major
so one can at least boot without this step, but be warned, this
will eventually go away. The bootblocks will have to be changed
before one can boot directly from an "ad" device though.

Fixed problems:

All known hang problems should be solved
The probe code has been sligthly changed, this should solve
the reports I have lying around (I hope).

Hangs when accessing ata & atapi device on the same channel simultaniously.
A real braino in ata_start caused this, fixed.

As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, agaiin you have been warned :)

But please tell me how it works for you!

Enjoy!

-Søren