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259065 |
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07-Dec-2013 |
gjb |
- Copy stable/10 (r259064) to releng/10.0 as part of the 10.0-RELEASE cycle. - Update __FreeBSD_version [1] - Set branch name to -RC1
[1] 10.0-CURRENT __FreeBSD_version value ended at '55', so start releng/10.0 at '100' so the branch is started with a value ending in zero.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation
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222107 |
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19-May-2011 |
yongari |
Fix typo.
Submitted by: brad at OpenBSD
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217649 |
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20-Jan-2011 |
yongari |
Correct wrong definition of PM timer mask and adjust L1/PM timer value. While I'm here enable all clocks before initializing controller. This change should fix lockup issue seen on AR8152 v1.1 PCIe Fast Ethernet controller.
PR: kern/154076 MFC after: 3 days
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211105 |
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09-Aug-2010 |
yongari |
Add support for Atheros AR8151/AR8152 PCIe gigabit/fast ethernet controller. These controllers are known as L1D(AR8151) and L2CB/B2(AR8152). This change adds supports for the following controllers. o AR8151 v1.0(L1D) gigabit ethernet controller o AR8151 v2.0(L1D) gigabit ethernet controller o AR8152 v1.1(L2CB) fast ethernet controller o AR8152 v2.0(L2CB2) fast ethernet controller These controllers have the same feature of AR8131/AR8132 and support improved power saving control. The user visible change at this moment is reduced jumbo frame size from 9KB to 6KB. Many thanks to Atheros for continuing to support FreeBSD.
HW donated by: Atheros Communications, Inc.
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210904 |
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05-Aug-2010 |
yongari |
Reduce Tx interrupt moderation timer from 50ms to 1ms. The default value resulted in poor performance for UDP packets. With this change, UDP bulk transfer performance is more than 940Mbps.
While I'm here fix a wrong register definition.
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193880 |
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10-Jun-2009 |
yongari |
Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernet controller. These controllers are also known as L1C(AR8131) and L2C(AR8132) respectively. These controllers resembles the first generation controller L1 but usage of different descriptor format and new register mappings over L1 register space requires a new driver. There are a couple of registers I still don't understand but the driver seems to have no critical issues for performance and stability. Currently alc(4) supports the following hardware features. o MSI o TCP Segmentation offload o Hardware VLAN tag insertion/stripping o Tx/Rx interrupt moderation o Hardware statistics counters(dev.alc.%d.stats) o Jumbo frame o WOL AR8131/AR8132 also supports Tx checksum offloading but I disabled it due to stability issues. I'm not sure this comes from broken sample boards or hardware bugs. If you know your controller works without problems you can still enable it. The controller has a silicon bug for Rx checksum offloading, so the feature was not implemented. I'd like to say big thanks to Atheros. Atheros kindly sent sample boards to me and answered several questions I had.
HW donated by: Atheros Communications, Inc.
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