| #
326638 |
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06-Dec-2017 |
jkim |
MFC: r267961, r309361, r322710, r323286, r326378, r326383, r326407
Sync. hwpstate with head.
r267961 (hselasky, partial):
Remove a redundant TUNABLE statement.
r309361 (danfe):
- Mention mismatching numbers in MSR vs. ACPI _PSS count warning.
- Rephrase unsupported AMD CPUs message and wrap as an overly long line.
- Improve readability when reporting resulted P-state transition (debug).
r322710, r323286 (cem):
- Add support for family 17h pstate info from MSRs.
- Yield CPU awaiting frequency change.
r326378, r326383, r326407:
- Fix some style(9) nits.
- Add a tunable "debug.hwpstate_verify" to check P-state after changing it
and turn it off by default.
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| #
309443 |
|
02-Dec-2016 |
jhb |
MFC 308005: Add powerd(8) support for several families of AMD CPUs.
Use the same logic to calculate the nominal CPU frequency from the P-state
MSRs on family 0x12, 0x15, and 0x16 CPUs as is used for family 0x10.
Family 0x14 was included in the original patch in the PR but I left that
out as the BIOS writer's guide for family 0x14 CPUs show a different layout
for the relevant MSR and include a different formulate for calculating the
frequency.
While here, simplify a few expressions and print out the family of
unsupported CPUs in hex rather than decimal.
PR: 212020
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