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292789 |
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27-Dec-2015 |
marius |
MFC: r287726
- Factor out the common and generic parts of the sparc64 host-PCI-bridge drivers into the revived sys/sparc64/pci/ofw_pci.c, previously already serving a similar purpose. This has been done with sun4v in mind, which explains a) the otherwise not that obvious scheme employed and b) why reusing sys/powerpc/ofw/ofw_pci.c was even lesser an option. - Add a workaround for QEMU once again not emulating real machines, in this case by not providing the OFW_PCI_CS_MEM64 range. [1]
Submitted by: jhb [1]
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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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220038 |
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26-Mar-2011 |
marius |
- Merge the *_SET macros from fire(4) which generally print out the register changes when compiled with SCHIZO_DEBUG and take advantage of them. - Add support for the XMITS Fireplane/Safari to PCI-X bridges. I tought I'd need this for a Sun Fire 3800, which then turned out to not being equipped with such a bridge though. The support for these should be complete but given that it hasn't actually been tested probing is disabled for now. This required a way to alter the XMITS configuration in case a PCI-X device is found further down the device tree so the sparc64 specific ofw_pci kobj was revived with a ofw_pci_setup_device method, which is called by the ofw_pcibus code for every device added. - A closer inspection of the OpenSolaris code indicates that consistent DMA flushing/syncing as well as the block store workaround should be applied with every BUS_DMASYNC_POSTREAD instead of in a wrapper around interrupt handlers for devices behind PCI-PCI bridges only as suggested by the documentation (code for the latter actually exists in OpenSolaris but is disabled by default), which also makes more sense. - Add a workaround for Casinni/Skyhawk combinations. Chances are that this solves the crashes seen when using the the on-board Casinni NICs of Sun Fire V480 equipped with centerplanes other than 501-6780 or 501-6790. This also takes advantage of the ofw_pci_setup_device method. - Mark some unused parameters as such.
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219567 |
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12-Mar-2011 |
marius |
Sync licenses and the corresponding RCS IDs with NetBSD, mainly switching the licenses of Matthew R. Green and the TNF to 2-clause.
Obtained from: NetBSD
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200918 |
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23-Dec-2009 |
marius |
Add structures for OFW MSI/MSI-X support. These are identical for both sun4u and sun4v.
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197164 |
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13-Sep-2009 |
marius |
Factor out the duplicated macro for the device type used in the OFW device tree for PCI bridges and add a new one for PCI Express. While at it, take advantage of the former for the rman(9) work- around in jbusppm(4).
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186128 |
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15-Dec-2008 |
nwhitehorn |
Adapt parts of the sparc64 Open Firmware bus enumeration code (in particular, the code for parsing interrupt maps) to PowerPC and reflect their new MI status by moving them to the shared dev/ofw directory.
This commit also modifies the OFW PCI enumeration procedure on PowerPC to allow the bus to find non-firmware-enumerated devices that Apple likes to add, and adds some useful Open Firmware properties (compat and name) to the pnpinfo string of children on OFW SBus, EBus, PCI, and MacIO links. Because of the change to PCI enumeration on PowerPC, X has started working again on PPC machines with Grackle hostbridges.
Reviewed by: marius Obtained from: sparc64
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182020 |
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22-Aug-2008 |
marius |
cosmetic changes and style fixes
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178579 |
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26-Apr-2008 |
marius |
Remove the MD isa_irq_pending() and the underlying PCI-specific infrastructure. Its only consumer ever was sio(4) and thus was unused on sparc64 since removing the last traces of sio(4) in sparc64 configuration files in favor for uart(4) over three years ago. If similar functionality is required again it should be brought back as an MD intr_pending() which works for all busses by using for example interrupt controller hooks.
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170930 |
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18-Jun-2007 |
marius |
- Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface, allowing the driver for the host-PCI-bridge to indicate that reenumeration of the PCI busses isn't supported by returning -1 instead of a valid PCI bus number. This is needed in order support both Tomatillo, which don't support reenumeration and thus are apparently intended to be used for independently numbered PCI domains only, and Psycho bridges, whose busses need to be reenumerated on at least some E450, without the #ifndef currently used for sun4v in order to support multiple independently PCI domains. The actual allocation/incrementation of the PCI bus numbers is now done in psycho(4), though it no longer establish a mapping between bus numbers and device nodes like ofw_pci_alloc_busno() did as that functionality wasn't used (but can easily brought back if really needed). The now no longer used sys/sparc64/pci/ofw_pci.c is also removed from sys/conf/files.sun4v as ofw_pci_alloc_busno() wasn't used there in the first place. - In ofw_pci_default_{adjust_busrange,intr_pending}() sanity check that the device has a parent before passing it on. - Make psycho_softcs static to sys/sparc64/pci/psycho.c as it's not used outside of that module. - In sys/sparc64/pci/ofw_pcib_subr.c remove the superfluous inclusion of opt_global.h and correct the debug output for adjusting the subordinate bus number.
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153061 |
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03-Dec-2005 |
marius |
- Move the declaration of struct upa_ranges and the UPA_RANGE_* macros from sys/sparc64/include/ofw_upa.h to sys/sparc64/pci/ofw_pci.h and rename them to struct ofw_pci_ranges and OFW_PCI_RANGE_* respectively. This ranges struct only applies to host-PCI bridges but no to other bridges found on UPA. At the same time it applies to all host-PCI bridges regardless of whether the interconnection bus is Fireplane/ Safari, JBus or UPA. - While here rename the PCI_CS_* macros in sys/sparc64/pci/ofw_pci.h to OFW_PCI_CS_* in order to be consistent and change this header to use uintXX_t instead of u_intXX_t.
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139825 |
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07-Jan-2005 |
imp |
/* -> /*- for license, minor formatting changes
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133589 |
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12-Aug-2004 |
marius |
- Introduce an ofw_bus kobj-interface for retrieving the OFW node and a subset ("compatible", "device_type", "model" and "name") of the standard properties in drivers for devices on Open Firmware supported busses. The standard properties "reg", "interrupts" und "address" are not covered by this interface because they are only of interest in the respective bridge code. There's a remaining standard property "status" which is unclear how to support properly but which also isn't used in FreeBSD at present. This ofw_bus kobj-interface allows to replace the various (ebus_get_node(), ofw_pci_get_node(), etc.) and partially inconsistent (central_get_type() vs. sbus_get_device_type(), etc.) existing IVAR ones with a common one. This in turn allows to simplify and remove code-duplication in drivers for devices that can hang off of more than one OFW supported bus. - Convert the sparc64 Central, EBus, FHC, PCI and SBus bus drivers and the drivers for their children to use the ofw_bus kobj-interface. The IVAR- interfaces of the Central, EBus and FHC are entirely replaced by this. The PCI bus driver used its own kobj-interface and now also uses the ofw_bus one. The IVARs special to the SBus, e.g. for retrieving the burst size, remain. Beware: this causes an ABI-breakage for modules of drivers which used the IVAR-interfaces, i.e. esp(4), hme(4), isp(4) and uart(4), which need to be recompiled. The style-inconsistencies introduced in some of the bus drivers will be fixed by tmm@ in a generic clean-up of the respective drivers later (he requested to add the changes in the "new" style). - Convert the powerpc MacIO bus driver and the drivers for its children to use the ofw_bus kobj-interface. This invloves removing the IVARs related to the "reg" property which were unused and a leftover from the NetBSD origini of the code. There's no ABI-breakage caused by this because none of these driver are currently built as modules. There are other powerpc bus drivers which can be converted to the ofw_bus kobj-interface, e.g. the PCI bus driver, which should be done together with converting powerpc to use the OFW PCI code from sparc64. - Make the SBus and FHC front-end of zs(4) and the sparc64 eeprom(4) take advantage of the ofw_bus kobj-interface and simplify them a bit.
Reviewed by: grehan, tmm Approved by: re (scottl) Discussed with: tmm Tested with: Sun AX1105, AXe, Ultra 2, Ultra 60; PPC cross-build on i386
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129051 |
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08-May-2004 |
marius |
- Remove the old sparc64 OFW PCI code (as opposed to the former "options OFW_NEWPCI"). This is a bit overdue, the new sparc64 OFW PCI code which is meant to replace the old one is in place for 10 months and enabled by default in GENERIC for 8 months. FreeBSD 5.2 and 5.2.1 also shipped with the new code enabled by default. - Some minor clean-up, e.g. remove functions that encapsulated the #ifdefs for OFW_NEWPCI, remove unused resp. no longer required includes, etc.
Approved by: tmm, no objections on freebsd-sparc64
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117119 |
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01-Jul-2003 |
tmm |
Add the new sparc64 OFW PCI framework, conditional on options OFW_NEWPCI for now. It introduces a OFW PCI bus driver and a generic OFW PCI-PCI bridge driver. By utilizing these, the PCI handling is much more elegant now.
The advantages of the new approach are: - Device enumeration should hopefully be more like on Solaris now, so unit numbers should match what's printed on the box more closely. - Real interrupt routing is implemented now, so cardbus bridges etc. have at least a chance to work. - The quirk tables are gone and have been replaced by (hopefully sufficient) heuristics. - Much cleaner code.
There was also a report that previously bogus interrupt assignments are fixed now, which can be attributed to the new heuristics.
A pitfall, and the reason why this is not the default yet, is that it changes device enumeration, as mentioned above, which can make it necessary to change the system configuration if more than one unit of a device type is present (on a system with two hme cars, for example, it is possible that hme0 becomes hme1 and vice versa after enabling the option). Systems with multiple disk controllers may need to be booted into single user (and require manual specification of the root file system on boot) to adjust the fstab. Nevertheless, I would like to encourage users to use this option, so that it can be made the default soon.
In detail, the changes are: - Introduce an OFW PCI bus driver; it inherits most methods from the generic PCI bus driver, but uses the firmware for enumeration, performs additional initialization for devices and firmware-specific interrupt routing. It also implements an OFW-specific method to allow child devices to get their firmware nodes. - Introduce an OFW PCI-PCI bridge driver; again, it inherits most of the generic PCI-PCI bridge driver; it has it's own method for interrupt routing, as well as some sparc64-specific methods (one to get the node again, and one to adjust the bridge bus range, since we need to reenumerate all PCI buses). - Convert the apb driver to the new way of handling things. - Provide a common framework for OFW bridge drivers, used be the two drivers above. - Provide a small common framework for interrupt routing (for all bridge types). - Convert the psycho driver to the new framework; this gets rid of a bunch of old kludges in pci_read_config(), and the whole preinitialization (ofw_pci_init()). - Convert the ISA MD part and the EBus driver to the new way interrupts and nodes are handled. - Introduce types for firmware interrupt properties. - Rename the old sparcbus_if to ofw_pci_if by repo copy (it is only required for PCI), and move it to a more correct location (new support methodsx were also added, and an old one was deprecated). - Fix a bunch of minor bugs, perform some cleanups.
In some cases, I introduced some minor code duplication to keep the new code clean, in hopes that the old code will be unifdef'ed soon.
Reviewed in part by: imp Tested by: jake, Marius Strobl <marius@alchemy.franken.de>, Sergey Mokryshev <mokr@mokr.net>, Chris Jackman <cjackNOSPAM@klatsch.org> Info on u30 firmware provided by: kris
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115417 |
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30-May-2003 |
tmm |
Fix interrupt assignment for non-builtin PCI devices on e450s.
This machine uses a non-standard scheme to specify the interrupts to be assigned for devices in PCI slots; instead of giving the INO or full interrupt number (which is done for the other devices in this box), the firmware interrupt properties contain intpin numbers, which have to be swizzled as usual on PCI-PCI bridges; however, the PCI host bridge nodes have no interrupt map, so we need to guess the correct INO by slot number of the device or the closest PCI-PCI bridge leading to it, and the intpin.
To do this, this fix makes the following changes: - Add a newbus method for sparc64 PCI host bridges to guess the INO, and glue code in ofw_pci_orb_callback() to invoke it based on a new quirk entry. The guessing is only done for interrupt numbers too low to contain any IGN found on e450s. - Create another new quirk entry was created to prevent mapping of EBus interrupts at PCI level; the e450 has full INOs in the interrupt properties of EBus devices, so trying to remap them could cause problems. - Set both quirk entries for e450s; remove the no-swizzle entry. - Determine the psycho half (bus A or B) a driver instance manages in psycho_attach() - Implement the new guessing method for psycho, using the slot number, psycho half and property value (intpin).
Thanks go to the testers, especially Brian Denehy, who tested many kernels for me until I had found the right workaround.
Tested by: Brian Denehy <B.Denehy@90east.com>, jake, fenner, Marius Strobl <marius@alchemy.franken.de>, Marian Dobre <mari@onix.ro> Approved by: re (scottl)
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106555 |
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07-Nov-2002 |
tmm |
Add two new workaround for firmware anomalies: 1. At least some Netra t1 models have PCI buses with no associated interrupt map, but obviously expect the PCI swizzle to be done with the interrupt number from the higher level as intpin. In this case, the mapping also needs to continue at parent bus nodes. To handle that, add a quirk table based on the "name" property of the root node to avoid breaking other boxen. This property is now retrieved and printed at boot. 2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped at all, and full interrupt numbers (not just INOs) are given in the interrupt properties. This is more or less cosmetical; the PCI interrupt numbers would be wrong, but the psycho resource allocation method would pass the right numbers on anyway.
Tested by: mux (1), Maxim Mazurok <maxim@km.ua> (2)
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98148 |
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12-Jun-2002 |
tmm |
Add PCI bus enumeration and latency timer setup to the sparc64 MD PCI code. Both tasks are not always performed completely by the firmware. The former is required to get some e450 models to boot; the latter fixes the repeated fifo underruns with hme(4)s and gem(4)s observed on some machines (and probably performance problems with other peripherals as well).
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93067 |
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24-Mar-2002 |
tmm |
Make the OpenFirmware interrupt mapping code more generic, to reduce the bus-dependent code and to be able to support more systems. The core of the new code is mostly obtained from NetBSD. Kluge the interrupt routing methods of the psycho and apb drivers so that an intline of 0 can be handled for now; real routing is still not possible (all intline registers are preinitialized instead); this will require a sparc64-specific adaption of the driver for generic PCI-PCI bridges with a custom routing method to work right.
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86231 |
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09-Nov-2001 |
tmm |
Add support for the Sun psycho/sabre UPA-PCI bridge, some OpenFirmware PCI support code, and a driver for the Sun APB PCI-PCI bridge. Partly ported from NetBSD.
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