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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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253508 |
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21-Jul-2013 |
adrian |
Initialise the watchdog and UART frequencies.
For all pre-AR933x chips, the frequency is just the APB frequency. For the AR933x, the UART frequency is different but we just hacked around it.
For the AR934x, there's a different PLL setting for these, so they have to be broken out.
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248781 |
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27-Mar-2013 |
adrian |
Add the reference clock for each supported chip.
Obtained from: Linux (openwrt)
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234941 |
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03-May-2012 |
adrian |
Fix a totally bone-headed, last minute bounds check snafu that somehow I must've missed when booting a test kernel.
This has been validated on the AR7161.
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234907 |
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02-May-2012 |
adrian |
Further ar71xx MII support improvements.
* Flesh out the PLL configuration fetch function, which will return the PLL configuration based on the unit number and speed. * Remove the PLL speed config logic from the AR71xx/AR91xx chip PLL config function - pass in a 'pll' value instead. * Modify arge_set_pll() to: + fetch the PLL configuration + write the PLL configuration + update the MII speed configuration.
This will allow if_arge to override the PLL configuration as required.
Obtained from: Linux/Atheros/OpenWRT
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234906 |
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01-May-2012 |
adrian |
MII related infrastructure changes.
* Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x.
Tested:
* AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up.
TODO:
* Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally.
Bugs (not fixed here):
* Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue.
Obtained from: Linux/Atheros/OpenWRT
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234326 |
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15-Apr-2012 |
adrian |
The AR913x MII speed configuration matches the AR71xx MII configuration. So share the code.
Don't do it for the AR724x - that has a completely different set of PLL and MII configuration parameters.
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233081 |
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17-Mar-2012 |
adrian |
Begin fleshing out MII clock rate configuration changes.
These are needed for some particular port configurations where the default speed isn't suitable for all link speed types. (Ie, changing 10/100/1000MBit PLL rate requires a similar MII clock rate, rather than a fixed MII rate.)
This is:
* only currently implemented for the ar71xx; * isn't used anywhere (yet), as the final interface for this hasn't yet been determined.
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228450 |
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13-Dec-2011 |
adrian |
Style(9) changes.
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228018 |
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27-Nov-2011 |
ray |
Join chip depended methods for arge0 and arge1 into single call with unit.
Approved by: adrian (mentor)
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223562 |
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26-Jun-2011 |
kevlo |
Remove duplicate header includes
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221240 |
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30-Apr-2011 |
adrian |
Add a missing DDR FIFO method for the ar71xx.
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211510 |
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19-Aug-2010 |
adrian |
Implement PLL generalisation in preparation for use in if_arge.
* Add a function to write to the relevant PLL register * Break out the PLL configuration for the AR71XX into the CPU ops, lifted from if_arge.c. * Add the AR91XX PLL configuration ops, using the AR91XX register definitions.
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211498 |
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19-Aug-2010 |
adrian |
Add missing licence.
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211476 |
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19-Aug-2010 |
adrian |
Preparation work for supporting the AR91xx and AR724x.
* Implement a SoC probe function, from Linux, which determines the SoC family, type and revision. This only probes the AR71xx series SoC and (currently) panics on others.
* Migrate some of the AR71XX specific hardware init (USB device, determining system frequencies) into using the cpuops introduced in an earlier commit. Other SoC specific hardware stuff (per-device flush/WB, GPIO pin wiring, Ethernet PLL setup, other things I've likely missed) will be introduced in subsequent commits.
Reviewed by: imp@ Obtained from: (partially) Linux
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