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322205 |
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07-Aug-2017 |
jkim |
MFC: r322076
Detect hypervisor early so that we set lower hz on it. > Description of fields to fill in above: 76 columns --| > PR: If and which Problem Report is related. > Submitted by: If someone else sent in the change. > Reported by: If someone else reported the issue. > Reviewed by: If someone else reviewed your modification. > Approved by: If you needed approval for this commit. > Obtained from: If the change is from a third party. > MFC after: N [day[s]|week[s]|month[s]]. Request a reminder email. > MFH: Ports tree branch name. Request approval for merge. > Relnotes: Set to 'yes' for mention in release notes. > Security: Vulnerability reference (one per line) or description. > Sponsored by: If the change was sponsored by an organization. > Differential Revision: https://reviews.freebsd.org/D### (*full* phabric URL needed). > Empty fields above will be automatically removed.
_M . M sys/amd64/amd64/machdep.c M sys/amd64/include/md_var.h M sys/i386/i386/machdep.c M sys/i386/include/md_var.h M sys/x86/x86/identcpu.c
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#
309426 |
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02-Dec-2016 |
jhb |
MFC 303753,308004: Add bounds checking on addresses used with /dev/mem.
303753: Don't permit mappings of invalid physical addresses on amd64 via /dev/mem.
308004: MFamd64: Add bounds checks on addresses used with /dev/mem.
Reject attempts to read from or memory map offsets in /dev/mem that are beyond the maximum-supported physical address of the current CPU.
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#
299062 |
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04-May-2016 |
avg |
MFC r297857: re-enable AMD Topology extension on certain models if disabled by BIOS
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#
286852 |
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17-Aug-2015 |
kib |
MFC r286228: Clear the IA32_MISC_ENABLE MSR bit on APs.
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286311 |
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05-Aug-2015 |
kib |
Implement x86 ptrace(2) requests PT_{GET,SET}{FS,GS}BASE.
MFC r284918: Add helper fill_based_sd(9).
MFC r284919: Add x86 PT_GETFSBASE, PT_GETGSBASE machine-depended ptrace requests to obtain the thread %fs and %gs bases. Add x86 PT_SETFSBASE and PT_SETGSBASE requests to set the bases from debuggers. The set requests, similarly to the sysarch({I386,AMD64}_SET_FSBASE), override the corresponding segment registers.
MFC r284965: Document x86 machine-specific ptrace(2) requests.
MFC r285011: Disallow a debugger on 64bit system to set fs/gs bases of the 32bit process beyond the end of the process address space.
MFC r285104: Grammar and language fixes.
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#
284338 |
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13-Jun-2015 |
kib |
MFC r284104: Updates from SDM rev. 55.
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#
278522 |
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10-Feb-2015 |
jhb |
MFC 273800: Rework virtual machine hypervisor detection. - Move the existing code to x86/x86/identcpu.c since it is x86-specific. - If the CPUID2_HV flag is set, assume a hypervisor is present and query the 0x40000000 leaf to determine the hypervisor vendor ID. Export the vendor ID and the highest supported hypervisor CPUID leaf via hv_vendor[] and hv_high variables, respectively. The hv_vendor[] array is also exported via the hw.hv_vendor sysctl. - Merge the VMWare detection code from tsc.c into the new probe in identcpu.c. Add a VM_GUEST_VMWARE to identify vmware and use that in the TSC code to identify VMWare.
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277374 |
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19-Jan-2015 |
kib |
MFC r277047: For x86, read MAXPHYADDR into variable cpu_maxphyaddr.
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#
276084 |
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22-Dec-2014 |
jhb |
MFC 273988,273989,273995,274057: MFamd64: Add support for extended FPU states on i386. This includes support for AVX on i386.
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#
276080 |
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22-Dec-2014 |
jhb |
MFC 273991: MFamd64: Move extern declaration of _ucodesel and _udatasel to <machine/md_var.h>
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#
276076 |
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22-Dec-2014 |
jhb |
MFC 271405,271408,271409,272658: MFamd64: Use initializecpu() to set various model-specific registers on AP startup and AP resume (it was already used for BSP startup and BSP resume).
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#
276070 |
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22-Dec-2014 |
jhb |
MFC 260557,271076,271077,271082,271083,271098: - Remove spaces from boot messages when we print the CPU ID/Family/Stepping - Move prototypes for various functions into out of C files and into <machine/md_var.h>. - Reduce diffs between i386 and amd64 initcpu.c and identcpu.c files. - Move blacklists of broken TSCs out of the printcpuinfo() function and into the TSC probe routine. - Merge the amd64 and i386 identcpu.c into a single x86 implementation.
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#
286852 |
|
17-Aug-2015 |
kib |
MFC r286228: Clear the IA32_MISC_ENABLE MSR bit on APs.
|
#
286311 |
|
05-Aug-2015 |
kib |
Implement x86 ptrace(2) requests PT_{GET,SET}{FS,GS}BASE.
MFC r284918: Add helper fill_based_sd(9).
MFC r284919: Add x86 PT_GETFSBASE, PT_GETGSBASE machine-depended ptrace requests to obtain the thread %fs and %gs bases. Add x86 PT_SETFSBASE and PT_SETGSBASE requests to set the bases from debuggers. The set requests, similarly to the sysarch({I386,AMD64}_SET_FSBASE), override the corresponding segment registers.
MFC r284965: Document x86 machine-specific ptrace(2) requests.
MFC r285011: Disallow a debugger on 64bit system to set fs/gs bases of the 32bit process beyond the end of the process address space.
MFC r285104: Grammar and language fixes.
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#
284338 |
|
13-Jun-2015 |
kib |
MFC r284104: Updates from SDM rev. 55.
|
#
278522 |
|
10-Feb-2015 |
jhb |
MFC 273800: Rework virtual machine hypervisor detection. - Move the existing code to x86/x86/identcpu.c since it is x86-specific. - If the CPUID2_HV flag is set, assume a hypervisor is present and query the 0x40000000 leaf to determine the hypervisor vendor ID. Export the vendor ID and the highest supported hypervisor CPUID leaf via hv_vendor[] and hv_high variables, respectively. The hv_vendor[] array is also exported via the hw.hv_vendor sysctl. - Merge the VMWare detection code from tsc.c into the new probe in identcpu.c. Add a VM_GUEST_VMWARE to identify vmware and use that in the TSC code to identify VMWare.
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#
277374 |
|
19-Jan-2015 |
kib |
MFC r277047: For x86, read MAXPHYADDR into variable cpu_maxphyaddr.
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#
276084 |
|
22-Dec-2014 |
jhb |
MFC 273988,273989,273995,274057: MFamd64: Add support for extended FPU states on i386. This includes support for AVX on i386.
|
#
276080 |
|
22-Dec-2014 |
jhb |
MFC 273991: MFamd64: Move extern declaration of _ucodesel and _udatasel to <machine/md_var.h>
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#
276076 |
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22-Dec-2014 |
jhb |
MFC 271405,271408,271409,272658: MFamd64: Use initializecpu() to set various model-specific registers on AP startup and AP resume (it was already used for BSP startup and BSP resume).
|
#
276070 |
|
22-Dec-2014 |
jhb |
MFC 260557,271076,271077,271082,271083,271098: - Remove spaces from boot messages when we print the CPU ID/Family/Stepping - Move prototypes for various functions into out of C files and into <machine/md_var.h>. - Reduce diffs between i386 and amd64 initcpu.c and identcpu.c files. - Move blacklists of broken TSCs out of the printcpuinfo() function and into the TSC probe routine. - Merge the amd64 and i386 identcpu.c into a single x86 implementation.
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