MFC: r287768, r290566, r290946

- Although it doesn't make a whole lot of sense to enable RX and TX
before their initial configuration is done, it turns out that r281337
(MFCed to stable/10 in r285177) has the inverse effect on some older
chips. Moreover, as with newer chips before, two chips seemingly
identical according to their MAC revisions may behave differently in
this regard, with most working but a few not, making changes extremely
hard to test.
Closer inspection of the corresponding Linux code suggests that RX
and TX should only be enabled after their initial configuration with
RTL8168G and later chips, i. e. RTL8106E{,US}, RTL8107E, as well as
RTL8168{EP,G,GU,H}, so limit the new code path to these. [1]
- Distinguish between RTL8168H and RTL8107E, with the latter being the
10/100-Mbit/s-only variant of the former.
- For MAC variants that can only do Fast Ethernet at a maximum, ensure
that we don't advertise Gigabit Ethernet speed.
- In re_stop(), do the inverse of re_init_locked() and enable RXDV gate
on RTL8168G and later chips again, matching what Linux does.
- With the latter in place, it turns out that WOL previously only worked
by accident with RTL8168G and later chips when the interface actually
was brought up. This is due to the fact that with these MAC variants,
RXDV gate needs be disabled for WOL to work. So in re_setwol() do just
that when IFCAP_WOL is requested.
- Add preliminary support for RTL8168H and RTL8107E, with the latter
being the 10/100-Mbit/s-only variant of the former.

MFC: r271864

Move rl(4) to dev/rl.

MFC: r281337

Don't enable RX and TX before their initial configuration is done, i. e.
after setting up interrupt moderation but before turning interrupts on.
This matches what Realtek's r8168 Linux driver does as of version 8.039.00
and fixes problems with certain incarnations of certain MAC revisions
like the interface requiring an extra up/down-cycle after boot to start
working or DMA configuration not being adhered to.

PR: 193743, 197535
Approved by: re (kib)

MFC r273359:
It seems multicast filtering of RTL8168F does not work. Workaround
the silicon bug by accepting any multicast packets.

PR: 193488

MFC r265943:
Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
Previously only TX IP checksum offloading was disabled but it's
reported that TX checksum offloading for UDP datagrams with IP
options also generates corrupted frames. Reporter's controller is
RTL8168CP but I guess RTL8168C also have the same issue since it
shall share the same core.

MFC: r261531

- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
driver as iof version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8411B.
This makes reception of packets work with the RTL8168G (HW rev. 0x4c000000)
in my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with: yongari

MFH: sync the netmap code with the one in HEAD
(enhanced VALE switch, netmap pipes, emulated netmap mode).
See details in the log for svn 261909.

MFC r257306:
Add preliminary support for RTL8168EP.
Approved by: re (delphij)

MFC r257305:
Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
RTL8168GU has two variants(GMII and MII) but it uses the same chip
revision id. Driver checks PCI device id of controller and
sets internal capability flag(i.e. jumbo frame and link speed down
in WOL).
Approved by: re (delphij)

MFC r256828:
Add preliminary support for RTL8106E PCIe FastEthernet.
Approved by: re (delphij)

r256827:
Correct MAC revision bits. Previously it always cleared bit 20 and
bit 21.
Approved by: re (delphij)

MFC: r281337

Don't enable RX and TX before their initial configuration is done, i. e.
after setting up interrupt moderation but before turning interrupts on.
This matches what Realtek's r8168 Linux driver does as of version 8.039.00
and fixes problems with certain incarnations of certain MAC revisions
like the interface requiring an extra up/down-cycle after boot to start
working or DMA configuration not being adhered to.

PR: 193743, 197535
Approved by: re (kib)

MFC r273359:
It seems multicast filtering of RTL8168F does not work. Workaround
the silicon bug by accepting any multicast packets.

PR: 193488

MFC r265943:
Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
Previously only TX IP checksum offloading was disabled but it's
reported that TX checksum offloading for UDP datagrams with IP
options also generates corrupted frames. Reporter's controller is
RTL8168CP but I guess RTL8168C also have the same issue since it
shall share the same core.

MFC: r261531

- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
driver as iof version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8411B.
This makes reception of packets work with the RTL8168G (HW rev. 0x4c000000)
in my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with: yongari

MFH: sync the netmap code with the one in HEAD
(enhanced VALE switch, netmap pipes, emulated netmap mode).
See details in the log for svn 261909.

MFC r257306:
Add preliminary support for RTL8168EP.
Approved by: re (delphij)

MFC r257305:
Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
RTL8168GU has two variants(GMII and MII) but it uses the same chip
revision id. Driver checks PCI device id of controller and
sets internal capability flag(i.e. jumbo frame and link speed down
in WOL).
Approved by: re (delphij)

MFC r256828:
Add preliminary support for RTL8106E PCIe FastEthernet.
Approved by: re (delphij)

r256827:
Correct MAC revision bits. Previously it always cleared bit 20 and
bit 21.
Approved by: re (delphij)