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256281 |
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10-Oct-2013 |
gjb |
Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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216551 |
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18-Dec-2010 |
yongari |
Add support for JMicron JMC251/JMC261 Gigabit/Fast ethernet controller with Card Read Host Controller. These controllers are multi-function devices and have the same ethernet core of JMC250/JMC260. Starting from REVFM 5(chip full mask revision) controllers have the following features. o eFuse support o PCD(Packet Completion Deferring) o More advanced PHY power saving
Because these controllers started to use eFuse, station address modified by driver is permanent as if it was written to EEPROM. If you have to change station address please save your controller default address to safe place before reprogramming it. There is no way to restore factory default station address.
Many thanks to JMicron for continuing to support FreeBSD.
HW donated by: JMicron
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215847 |
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26-Nov-2010 |
yongari |
Disable retrying RX descriptor loading. The counter is used to set number of retry to be performed whenever controller found RX descriptor was empty. RX empty interrupt is generated only when the retry counter is over. Experimentation shows retrying RX descriptor loading increased number of dropped frames under flow-control enabled environments so disable it and have controller generate RX empty interrupt as fast as it can. While I'm here fix RXCSR_DESC_RT_CNT macro.
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185597 |
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04-Dec-2008 |
yongari |
Add HW MAC counter support for newer JMC250/JMC260 revisions.
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185596 |
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04-Dec-2008 |
yongari |
Add support for newer JMC250/JMC260 revisions. o Chip full mask revision 2 or later controllers have to set correct Tx MAC and Tx offload clock depending on negotiated link speed. o JMC260 chip full mask revision 2 has a silicon bug that can't handle 64bit DMA addressing. Add workaround to the bug by limiting DMA address space to be within 32bit. o Valid FIFO space of receive control and status register was changed on chip full mask revision 2 or later controllers. For these controllers, use default 16QW as it's supposed to be the safest value for maximum PCIe compatibility. JMicron confirmed performance will not be reduced even if the FIFO space is set to 16QW. o When interface is put into suspend/shutdown state, remove Tx MAC and Tx offload clock to save more power. We don't need Tx clock at all in this state. o Added new register definition for chip full mask revision 2 or later controllers.
Thanks to JMicron for their continuous support of FreeBSD.
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183814 |
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12-Oct-2008 |
yongari |
Read PCI device id instead of PCI revision id. Also checks the read device id is JMC260 family. Previously it just verified the deivce is JMC260 Rev A0. This will make it easy for newer JMC2xx support.
Pointed out by: bouyer at NetBSD
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183264 |
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22-Sep-2008 |
yongari |
Add workaround for occasional packet loss issue of JMC250 A2 when it runs on half-duplex media. While I'm here add register definition for GPREG1. ATM the GPREG1 register is only valid for JMC250 A1/A2.
Submitted by: Ethan at JMicron
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182888 |
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09-Sep-2008 |
yongari |
Add workaround for CRC errors seen at 100Mbps on JMC250 A2. While here update chip revision number of JMC250/JMC260 from the latest datasheet.
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179337 |
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26-May-2008 |
yongari |
Add driver support for PCIe adapters based on JMicron JMC250 gigabit ethernet and JMC260 fast ethernet controllers. ATM jme(4) supports all hardware features except RSS and multiple Tx/Rx queue.
In these days most ethernet controller vendors take a ply of concealing hardware detailes from open source developers. As contrasted with these vendors JMicron provided all necessary information needed to write a stable driver during driver writing and answered many questions I had. They even helped fixing driver bugs with protocol analyzer. Many thanks to JMicron for their support of FreeBSD.
H/W donated by: JMicron
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