MFC r280278, r280402:

Allow to override default kernel virtual address assignment on ARM.

Do not save/restore the TLS pointer on context switch for armv6.

MFC 264203, 264204, 264206, 264218:

Tell VM we now have ARM platforms with physically discontiguous memory.

Define the full 1024M of ram on the imx51 and imx53 boards.

Use a more professional uart device description.

MFC 264128, 264129, 264130, 264135,

Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
after TTB is set.

Fix TLB maintenance issues for armv6 and armv7.

- Add cpu_cpwait to comply with the convention.
- Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
with distinguishing between D and ID pages.
- Modify pmap init/bootstrap invalidations to ID, just to be safe.
- Fix TLB-inv and PTE_SYNC ordering.

Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
This is performance enhancement rather than bugfix.

We don't support any ARM systems with an ISA bus and don't need a freelist
of memory to support ISA addressing limitations.

MFC r257854 (discussed with alc@)

As of r257209, all architectures have defined
VM_KMEM_SIZE_SCALE. In other words, every architecture is now
auto-sizing the kmem arena. This revision changes kmeminit() so
that the definition of VM_KMEM_SIZE_SCALE becomes mandatory and
the definition of VM_KMEM_SIZE becomes optional.

Replace or eliminate all existing definitions of VM_KMEM_SIZE.
With auto-sizing enabled, VM_KMEM_SIZE effectively became an
alternate spelling for VM_KMEM_SIZE_MIN on most architectures.
Use VM_KMEM_SIZE_MIN for clarity.

MFC r257549, r261642

Don't create a distinct free page pool for segregating allocations that are
accessed through the direct map unless the kernel configuration actually
includes a direct map. Only a few configurations do, and for the rest the
unnecessary free page pool is a small pessimization.

Remove the ARM_USE_SMALL_ALLOC option and code related to it.

MFC r280278, r280402:

Allow to override default kernel virtual address assignment on ARM.

Do not save/restore the TLS pointer on context switch for armv6.

MFC 264203, 264204, 264206, 264218:

Tell VM we now have ARM platforms with physically discontiguous memory.

Define the full 1024M of ram on the imx51 and imx53 boards.

Use a more professional uart device description.

MFC 264128, 264129, 264130, 264135,

Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
after TTB is set.

Fix TLB maintenance issues for armv6 and armv7.

- Add cpu_cpwait to comply with the convention.
- Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
with distinguishing between D and ID pages.
- Modify pmap init/bootstrap invalidations to ID, just to be safe.
- Fix TLB-inv and PTE_SYNC ordering.

Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
This is performance enhancement rather than bugfix.

We don't support any ARM systems with an ISA bus and don't need a freelist
of memory to support ISA addressing limitations.

MFC r257854 (discussed with alc@)

As of r257209, all architectures have defined
VM_KMEM_SIZE_SCALE. In other words, every architecture is now
auto-sizing the kmem arena. This revision changes kmeminit() so
that the definition of VM_KMEM_SIZE_SCALE becomes mandatory and
the definition of VM_KMEM_SIZE becomes optional.

Replace or eliminate all existing definitions of VM_KMEM_SIZE.
With auto-sizing enabled, VM_KMEM_SIZE effectively became an
alternate spelling for VM_KMEM_SIZE_MIN on most architectures.
Use VM_KMEM_SIZE_MIN for clarity.

MFC r257549, r261642

Don't create a distinct free page pool for segregating allocations that are
accessed through the direct map unless the kernel configuration actually
includes a direct map. Only a few configurations do, and for the rest the
unnecessary free page pool is a small pessimization.

Remove the ARM_USE_SMALL_ALLOC option and code related to it.