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9bd8d1d5 |
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03-Apr-2019 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
replacing umlaute and fixing address in headers Haldeneggsteig -> Universitaetsstrasse Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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4213f5b8 |
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15-Mar-2018 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
caps: adding endpoint cap type for UMP endpoints Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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27701384 |
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28-Jun-2016 |
David Cock <david.cock@inf.ethz.ch> |
ARM: Removed traces of ARMv7-M and ARMv5 code. Signed-off-by: David Cock <david.cock@inf.ethz.ch>
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be54ebeb |
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29-Apr-2016 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
T191: x86_64: refactor retype2 back to retype Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>
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75b789f7 |
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20-Apr-2016 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
T191: change all of user space to call new retype directly; turn off count = 0 behaviour in kernel Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>
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f747554f |
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17-Nov-2015 |
Moritz Hoffmann <moritz.hoffmann@inf.ethz.ch> |
T24: remove remaining SCC code Signed-off-by: Moritz Hoffmann <moritz.hoffmann@inf.ethz.ch>
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9dec7677 |
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01-Jun-2015 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
Initial AArch64/ARMv8 skeleton. This includes enough code and definitions to generate all *.depend files for AArch64/ARMv8 and to build a mostly empty cpu driver for the Applied Micro X-Gene 1 (apm88xxxx) SoC. Note: the definitions should be taken with a large grain of salt, some of them are not updated for AArch64/ARMv8. Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>
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b31fabf5 |
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06-Dec-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Add BF_BINARY_PREFIX define to configure binary path by build system.
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3f0cf56b |
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14-Apr-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Added K1OM switches to init Fixed hardcoded address in entry.S
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e1634dc8 |
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29-Aug-2013 |
Claudio Föllmi <foellmic@student.ethz.ch> |
basic armv7-m support added new hake architecture "armv7-m" added armv7-m port of kernel and libbarrelfish fixed small arm_molly issues with parsing paths containing '-' the port does not actually handle interrupts yet, but scheduling, spawning, and starting processes works this update does not yet contain the armv7-a code to start the m3 core
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b600a240 |
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08-Mar-2013 |
Kornilios Kourtis <kkourt@inf.ethz.ch> |
New tracing infrastructure This is a Distributed Systems Lab project by Alexander Grest <agrest@student.ethz.ch> and David Stolz <stolzda@ethz.ch>
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54e7593f |
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22-Nov-2012 |
Simon Gerber <simugerber@student.ethz.ch> |
Barrelfish (standard config) boots with 1 mapping per cap copy.
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8da6e0d2 |
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20-Aug-2012 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
Fixed misc. paths that were overlooked when renaming 'arm' to 'armv5'.
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70a2b08d |
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17-Aug-2012 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
Changed ARMv7.hs to include -D__GEM5__ depending on Config.enable_gem5 instead of always.
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b7aebb7e |
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16-Aug-2012 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
Renamed arm_gem5 to armv7. TODO: * Figure out if the __GEM5__ define actually refers to gem5 or just to ARMv7.
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b88f14b4 |
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04-Aug-2012 |
pravin@inf.ethz.ch <pravin@inf.ethz.ch> |
Userspace is working now. There was an issue with stack pointer not restored properly, but now it is fixed by restoring sp separately with help of temporary register. Currently code stops somewhere in mem_serv with complain MM_ERR_OUT_OF_BOUNDS
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f8512ecf |
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31-Jul-2012 |
Stefan Kästle <stefan.kaestle@inf.ethz.ch> |
Steps towards going to user-level. The first sys_print works (from within the dispatcher of init), but the state does not seem to be restored properly. The infinite-loop after this sys_print is never reached. I assume the code to restore the registers in swi_done is broken. This code is not stable. A lot of things are disabled, e.g. caching, interrupts. Also, there are some infinite loops in there.
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d1897013 |
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29-May-2012 |
Samuel Hitz <samuel.hitz@gmail.com> |
renamed architecture from 'gem5' to 'arm_gem5' --HG-- rename : hake/Gem5.hs => hake/ArmGem5.hs rename : hake/menu.lst.gem5 => hake/menu.lst.arm_gem5 rename : if/arch/gem5.if => if/arch/arm_gem5.if rename : if/platform/gem5.if => if/platform/arm_gem5.if rename : kernel/arch/gem5/boot.S => kernel/arch/arm_gem5/boot.S rename : kernel/arch/gem5/exceptions.S => kernel/arch/arm_gem5/exceptions.S rename : kernel/arch/gem5/init.c => kernel/arch/arm_gem5/init.c rename : kernel/arch/gem5/integrator.c => kernel/arch/arm_gem5/integrator.c rename : kernel/arch/gem5/linker.lds.in => kernel/arch/arm_gem5/linker.lds.in rename : kernel/arch/gem5/paging.c => kernel/arch/arm_gem5/paging.c rename : kernel/arch/gem5/pl011_uart.c => kernel/arch/arm_gem5/pl011_uart.c rename : kernel/arch/gem5/startup_arch.c => kernel/arch/arm_gem5/startup_arch.c rename : kernel/include/arch/gem5/arch_gdb_stub.h => kernel/include/arch/arm_gem5/arch_gdb_stub.h rename : kernel/include/arch/gem5/arm.h => kernel/include/arch/arm_gem5/arm.h rename : kernel/include/arch/gem5/arm_hal.h => kernel/include/arch/arm_gem5/arm_hal.h rename : kernel/include/arch/gem5/conio.h => kernel/include/arch/arm_gem5/conio.h rename : kernel/include/arch/gem5/cp15.h => kernel/include/arch/arm_gem5/cp15.h rename : kernel/include/arch/gem5/exceptions.h => kernel/include/arch/arm_gem5/exceptions.h rename : kernel/include/arch/gem5/init.h => kernel/include/arch/arm_gem5/init.h rename : kernel/include/arch/gem5/irq.h => kernel/include/arch/arm_gem5/irq.h rename : kernel/include/arch/gem5/ixp2800_uart.h => kernel/include/arch/arm_gem5/ixp2800_uart.h rename : kernel/include/arch/gem5/kputchar.h => kernel/include/arch/arm_gem5/kputchar.h rename : kernel/include/arch/gem5/misc.h => kernel/include/arch/arm_gem5/misc.h rename : kernel/include/arch/gem5/offsets.h => kernel/include/arch/arm_gem5/offsets.h rename : kernel/include/arch/gem5/paging_kernel_arch.h => kernel/include/arch/arm_gem5/paging_kernel_arch.h rename : kernel/include/arch/gem5/phys_mmap.h => kernel/include/arch/arm_gem5/phys_mmap.h rename : kernel/include/arch/gem5/pl011_uart.h => kernel/include/arch/arm_gem5/pl011_uart.h rename : tools/gem5/CacheConfig.py => tools/arm_gem5/CacheConfig.py rename : tools/gem5/Caches.py => tools/arm_gem5/Caches.py rename : tools/gem5/O3_ARM_v7a.py => tools/arm_gem5/O3_ARM_v7a.py rename : tools/gem5/README => tools/arm_gem5/README rename : tools/gem5/RealView.py => tools/arm_gem5/RealView.py rename : tools/gem5/RealView.py.patch => tools/arm_gem5/RealView.py.patch rename : tools/gem5/arm-core.xml => tools/arm_gem5/arm-core.xml rename : tools/gem5/arm-vfpv3.xml => tools/arm_gem5/arm-vfpv3.xml rename : tools/gem5/arm-with-neon.xml => tools/arm_gem5/arm-with-neon.xml rename : tools/gem5/boot.arm => tools/arm_gem5/boot.arm rename : tools/gem5/debug.gem5.gdb => tools/arm_gem5/debug.gem5.gdb rename : tools/gem5/gem5script.py => tools/arm_gem5/gem5script.py rename : tools/gem5/system.cc.patch => tools/arm_gem5/system.cc.patch
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e6b486aa |
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22-May-2012 |
Samuel Hitz <samuel.hitz@gmail.com> |
kernel and userspace now working, removed some debug printfs, general code cleanup
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70c30847 |
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23-Jan-2012 |
Andrew Baumann <andrew.baumann@microsoft.com> |
remove support for Beehive see the mailing list discussion at the end of December 2011 for motivation
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9299dcef |
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08-Jul-2011 |
Stefan Kästle <stefan.kaestle@inf.ethz.ch> |
Initial version of public stable barrelfish repository.
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