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9bd8d1d5 |
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03-Apr-2019 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
replacing umlaute and fixing address in headers Haldeneggsteig -> Universitaetsstrasse
Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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| #
e2f4fe27 |
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10-Mar-2017 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
ARMv8: adding support for the parking protocol to coreboot
Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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b248e04f |
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04-Mar-2017 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
coreboot: restore the debug print state
Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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| #
75637bae |
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03-Mar-2017 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
coreboot: prepare new cpudriver on armv8 and use of hwid_t
Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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| #
244ab29c |
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27-Feb-2017 |
Adam Turowski <adam.turowski@inf.ethz.ch> |
flounder: merging rpc client with a binding layer
Signed-off-by: Adam Turowski <adam.turowski@inf.ethz.ch>
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| #
82ebc136 |
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26-Jul-2016 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
coreboot: fixing build after moving acpi rpc include
Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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| #
f0c05b32 |
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28-Nov-2014 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
reverted to disabled coreboot debug.
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| #
cc3744d5 |
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26-Nov-2014 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
Made cpuboot compile for the K1OM architecture.
Adding of triplet parameter for the boot program:
corectrl boot {from:step:to}
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| #
089514f9 |
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11-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Make sure it compiles on x86 again.
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| #
b4804bce |
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11-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Refactored code to boot arm into x86boot.
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| #
2aefd934 |
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07-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Remove unused code in cpuboot files.
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| #
194401ab |
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07-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Disable debug.
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| #
bb839de2 |
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07-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Starting to add 32bit boot functionality.
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| #
fbd24557 |
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05-Nov-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Refactoring coreboot boot driver.
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| #
b6ecbc80 |
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22-Oct-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Boot cores by providing barrelfish core ID.
Instead of APIC ID which is HW specific.
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| #
5ae4dc83 |
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21-Oct-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Remove the KernelCmd_StopCore.
We do not really have need for this as long as booting a core is fast
enough.
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| #
dc4f8ab0 |
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21-Oct-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Disable Debug and add printf for core shutdown.
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| #
6e70991a |
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28-May-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Cleanup code.
Remove some no longer needed binaries from symbolic targets and
print statements from pci_client.
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| #
b6aa6100 |
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02-May-2014 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
last fixes for coreboot.
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| #
d622c398 |
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30-Apr-2014 |
Simon Gerber <simon.gerber@inf.ethz.ch> |
cpuboot: added detailed performance instrumentation.
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| #
b609745f |
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16-Apr-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Option to specify monitor.
Allows to boot different monitor/kernel combinations.
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| #
cfff7f4b |
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16-Apr-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Remove KCB global var II.
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| #
c24edb05 |
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15-Apr-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Fix argument parsing and allow to overwrite KCB.
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| #
57ce2309 |
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15-Apr-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Refactoring of cpuboot.
- Better command line parsing
- More command line switches
- Uses oct_lock/unlock API for sequential access
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| #
f011e5b2 |
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15-Apr-2014 |
Gerd Zellweger <mail@gerdzellweger.com> |
Separating arch and arch idependent code.
|