replacing umlaute and fixing address in headers Haldeneggsteig -> Universitaetsstrasse

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>

armv7: fixing thread context switching

Signed-off-by: Adam Turowski <adam.turowski@inf.ethz.ch>

armv7: fixing VFP support

Signed-off-by: Adam Turowski <adam.turowski@inf.ethz.ch>

armv7: save vfp context (at least part of it)

Signed-off-by: Adam Turowski <adam.turowski@inf.ethz.ch>

Documentation, and cleaner dispatcher mode tracking code. Still bug with yield.

Signed-off-by: Timothy Roscoe <troscoe@inf.ethz.ch>

T211: Force GCC to save r0,r1,r2 in functions that call another function with __attribute__((naked))

Not sure whether this is due to a subtle bug in our code (e.g. what are the
guarantees you get when calling a naked function?), or whether there is an
actual bug in the ARM GCC 5.3.1 (Ubuntu/Linaro 5.3.1-13ubuntu3) 5.3.1
20160330) that ships with Ubuntu 16.04.

The symptom was that saving the epilog IP in the saved state would trigger a
pagefault while disabled, as the address it was trying to write to was now
<CPSR value>+offsetof(state, named)+offsetof(named, pc).

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

Make sure ARM kernels are working agian.

armv5: wrapped all clrex instructions in #ifndef __ARM_ARCH_5__.

Make ARMv7 cpu driver run in SVC mode

From https://lists.inf.ethz.ch/pipermail/barrelfish-users/2013-July/001092.html

timer interrupts enabled

fixed interrupt handler writing to trap area for non-trap interrupts
enabled timer interrupts at reasonable intervals (reasonable for -O2 and no caches)
added system call for restoring a context (just for armv7-m, replacing a x86-specific interrupt),
because the ONLY way to restore an IT block is by exiting handler mode (there is literally no other mechanism)
(will only be called if userspace tries to restore a context that was saved by the kernel, and comes from interrupting an IT block or a ldm/stm instruction)

You may want to use -O2 from now on (because we use interrupts, and thrashing is possible)
The compiler we use will probably complain up to 3 times ("unable to find a register to spill in class 'GENERAL_REGS'")
just retry the faulting compile instruction with -O1, and then restart make

basic armv7-m support

added new hake architecture "armv7-m"
added armv7-m port of kernel and libbarrelfish
fixed small arm_molly issues with parsing paths containing '-'

the port does not actually handle interrupts yet, but scheduling, spawning, and starting processes works
this update does not yet contain the armv7-a code to start the m3 core

arm: Fixed state mixup in user-level thread switching.

--HG--
extra : rebase_source : 3442a69538187d20b0ae5deeabf861cac7588462

libbarrelfish: Rename the header lib/barrelfish/include/threads.h to
lib/barrelfish/include/threads_priv.h.

To avoid confusion between the public and the private thread header, rename
the libbarrelfish-private thread header to threads_priv.h.

--HG--
rename : lib/barrelfish/include/threads.h => lib/barrelfish/include/threads_priv.h

newlib,arm: make arm compile with newlib

Replaced caddr_t type with capaddr_t to avoid conflict with libc

for i in $(find . -type f)
do
grep -r caddr_t $i
if [ $? -eq 0 ]
then
sed 's/caddr_t/capaddr_t/g' $i > $i.sed
mv $i.sed $i
fi
done

Initial version of public stable barrelfish repository.