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c053ffb6 |
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28-Jun-2018 |
Roni Häcki <roni.haecki@inf.ethz.ch> |
xeon phi: move HW MODEL flag to public header as DMA library also needs it Signed-off-by: Roni Häcki <roni.haecki@inf.ethz.ch>
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16c3458f |
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06-Apr-2018 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
xeonphi: towards support for model based allocations Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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4008c3c9 |
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25-Jun-2015 |
Reto Achermann <reto.achermann@inf.ethz.ch> |
Xeon Phi boot: getting rid of the single boot image and dependencies Adapting the boot protocol of the Xeon Phi cards to dynamically load the individual modules at run time rather than compile time. The following sources can be used to load the modules - in ramfs of host machine - from a TFTP server (using the --tftp flag) - from NFS (using the --nfs flag) The modules to be loaded are specified in a supplied menu.lst file. The parameter --modlist can be used to specify that file. The boot driver will handle the generation of the needed data structures and headers when the card boots. Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>
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42b6d7d2 |
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30-Jul-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Xeon Phi Driver: switched to the new Xeon Phi Client, added open call to interphi interface.
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5677cc4f |
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29-Jul-2014 |
Reto Achermann <acreto@student.ethz.ch> |
adapted the K1OM boot to hand over the message frame size to xeon phi.
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b9443d58 |
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29-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Addition of checks if running on xeon phi or host
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a02a0731 |
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27-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Bugfix: Xeon Phi ID Moved the xeon phi id to another part of the struct to make it work. Removed ifdefed out code form xeon phi driver.
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df57367a |
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27-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Kernel: Added a new field to the dispatcher struct for K1OM architecutre Addition of xeon_phi_id information to the dispatcher generic struct Adding of a new function to obtain this structure Adding of new fields to multiboot and coredata structures (xeon_phi_info) Adapted lib spawndomain to forward the own xeon phi id when spawning kernel: shows message on which Xeon Phi we are running on.
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4e9ef71f |
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24-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Xeon Phi DMA: Service stubs Added some stubs for the service interface of the Xeon Phi DMA server.
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6f718e4c |
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24-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Xeon Phi DMA initial design and layout of the Xeon Phi DMA functionality.
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efa2ff22 |
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03-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Exchange of base address for messaging bootstrap When the host starts the Xeon Phi it writes the address of the messaging frame into the bootparams and this address is passed to the xeon phi cardside driver which contacts the host and uses this frame to establish more messaging channels.
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78ade5c8 |
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03-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Added K1OM architecture specific extensions that pass certain caps / values to the Xeon Phi manager (card side) - Passing of cap for the MMIO space and the System Memory range - passing of base address for the host messaging listener - Removed IO cap
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a19e457e |
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02-Jun-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Adapted xeon phi boot params and passing of cmd lines.
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d13c7d2f |
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30-Apr-2014 |
Reto Achermann <acreto@student.ethz.ch> |
added entries to gitignore
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d45a3c43 |
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29-Apr-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Addition of a second supercn. It turned out that running Barrelfish on machines with lots of RAM will results in a error during booting that the supercn has no more space left. As soon as supercn0 has no space left, the allocator will switch to the second supercn1 to store the capabilities. Also memserver will get both endpoints and switches automatically to the next supercn while building up the memory allocator. The maximum size bits are extended to 40. The offsets are adapted to support 1024GB physical memory. The implementation has been tested on qemu prior commit.
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562e9a4b |
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28-Apr-2014 |
Reto Achermann <acreto@student.ethz.ch> |
Added: Xeon Phi Manager Responsible for assigning a unique ID to the Xeon Phi drivers and exchanging the irefs of xeon phi drivers such that they can connect to eachother
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