replacing umlaute and fixing address in headers Haldeneggsteig -> Universitaetsstrasse

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>

armv7: remove gic dist debug

Signed-off-by: Lukas Humbel <lukas.humbel@inf.ethz.ch>

armv7: Move distributor driver to userspace

Signed-off-by: Lukas Humbel <lukas.humbel@inf.ethz.ch>

kernel,libbarrelfish: Add debug syscall for flushing the TLB.

Signed-off-by: Gerd Zellweger <mail@gerdzellweger.com>

Add mdb operation counts to calculate scores for different implementations

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

Add mdb operation counts to calculate scores for different implementations

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

Implement get_mdb_size() debug syscall

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

Implement get_mdb_size() debug syscall

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

ARMv8: remove PSCI_ON debug syscall

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>

ARMv8: adding debug syscall to get coreboot test working

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>

Squashed changes of e89aa91..6ca6bdf (master as of 2016-04-18).

Take this commit out when merging

Signed-off-by: Simon Gerber <simon.gerber@inf.ethz.ch>

IRQ: added irq source capability and make the inthandler setup use it

Signed-off-by: Lukas Humbel <lukas.humbel@inf.ethz.ch>

T119: kernel, spawn, libbarrelfish, fish: Remove DEBUG_PRINT_CAPABILITIES syscall. Use capinvoke from fish instead. Improve output formatting.

Signed-off-by: Moritz Hoffmann <moritz.hoffmann@inf.ethz.ch>

T119: kernel: Unify debug_print_capabilities in sys_debug.c

Signed-off-by: Moritz Hoffmann <moritz.hoffmann@inf.ethz.ch>

The Arrakis backport to Barrelfish.

Here are the macro changes:
* Made lwIP an optional network stack
* Moved lwIP headers out of the general include directory
* Parallel hake
* CPU-virtualized ("arrakis") applications
* libarrakis is a new libOS that uses CPU features directly
* arrakismon is a new monitor for Arrakis apps
* QEMU Multiboot support instead of GRUB (enables KVM)
* e10k virtual function driver
* Software virtual->physical mapping (substitutes IOMMU)
* To be replaced soon with an Intel IOMMU driver
* Better GDB and stack tracing support
* New POSIX support
* pthreads, inet_*(), usleep(), syslimits.h, sigaction(), mman.h,
* resource.h, sendmsg(), recvmsg(), mkfifo(), syslog.h, sysexits.h,
* fcntl(), getegid(), getgid(), pipe(), rlimits
* epoll support
* Separate waitset for interrupts
* Thread TLS key and ID support
* Moved PCRE headers to include/, where they usually are
* Intel performance counters support
* Handle boot-time RAM overflow (for machines with >=64GB RAM)
* Arranet network stack
* Fix for build of lib/barrelfish/arch/x86_64/dispatch.c without -O2
* New comandline options to pci daemon:
* maxvfs=x, x is number of virtual functions to create for each
* device supporting it
* skb_bridge_program=x, x is SKB bridge programming script to use
* bridge_bios is a script that uses the BIOS pre-set values, like Linux
* Correctly build machine-optimized newlib parts
* Library versions of e1000 and e10k drivers
* Support for virtualization in e10k driver
* e10k datacenter control plane daemon
* Modified hellotest to be both a Barrelfish and an Arrakis application

I've decided not to include the lwIP 1.4.1 code, as the port is
not finished and who wants to use lwIP anyway with the Arrakis
network stack and mTCP being released soon. If you want this,
let me know (it's hugely superior to lwIP 1.3.1).

I've made the code backwards-compatible with Barrelfish. The
default should do what Barrelfish does. One can specify
commandline options to the PCI daemon and e10k driver to
configure I/O virtualization and the optional arrakismon allows
loading CPU-virtualized "arrakis" programs.

There are more pending changes, such as support for hardware
rate limiting and weighted round robin packet scheduling, but
I'd like these to go in first, before I push the rest.

Added basic support for the Cortex A9 Global Timer

The Cortex A9 global timer is a 64-bit incrementing counter, which
is memory mapped in the private memory region. Thus, the code for
the timer is currently all in the CPU driver.

To read out the timer in userspace, two system calls are needed,
one for the lower and and one for the upper half of the counter.
The following helper function is provided to correctly read out
the timer value in two 32 bit reads as suggested in the ARM TRM:

errval_t sys_debug_hardware_global_timer_read(uint64_t *ret)

timer interrupts enabled

fixed interrupt handler writing to trap area for non-trap interrupts
enabled timer interrupts at reasonable intervals (reasonable for -O2 and no caches)
added system call for restoring a context (just for armv7-m, replacing a x86-specific interrupt),
because the ONLY way to restore an IT block is by exiting handler mode (there is literally no other mechanism)
(will only be called if userspace tries to restore a context that was saved by the kernel, and comes from interrupting an IT block or a ldm/stm instruction)

You may want to use -O2 from now on (because we use interrupts, and thrashing is possible)
The compiler we use will probably complain up to 3 times ("unable to find a register to spill in class 'GENERAL_REGS'")
just retry the faulting compile instruction with -O1, and then restart make

Added debug syscall & Config.hs variable for physmem capability tracing.

Merge from ASPLOS tree.

Initial version of public stable barrelfish repository.