History log of /barrelfish-master/devices/xapic.dev
Revision Date Author Comments
# 9bd8d1d5 03-Apr-2019 Reto Achermann <reto.achermann@inf.ethz.ch>

replacing umlaute and fixing address in headers Haldeneggsteig -> Universitaetsstrasse

Signed-off-by: Reto Achermann <reto.achermann@inf.ethz.ch>


# 05f3eb5a 27-Nov-2016 Adam Turowski <adam.turowski@inf.ethz.ch>

systime: introducing system time based on time stamp counter/global timer, removing kernel_now

Signed-off-by: Adam Turowski <adam.turowski@inf.ethz.ch>


# b8df64a8 17-Apr-2014 Reto Achermann <acreto@student.ethz.ch>

Multicore support for the Xeon Phi

- Adapted the xapic.dev to account for the special register layout in
icr and id register
- added switches to use alternative register layout in apic.c
- added APIC and FLASH memoryhole in mmap
- Bugfix: Wrong CPU information (cpu_arch.h)
- Added: delay_ms assembly that stalls the CPU some time (needed for
booting the cores)
- Some fixes with memory offsets in startu parch
- Added: support for pagetables that map MMIO range of the xeon phi in
init_ap.S
- Added Delays in start_aps
- Adpted offset in entry.S fo match for the new layout
- Removed Global Flag for the valid page table bits
- Disabled activation of MMX


# 559955b4 02-Aug-2011 Simon Peter <speter@inf.ethz.ch>

Merge from ASPLOS tree.


# 9299dcef 08-Jul-2011 Stefan Kästle <stefan.kaestle@inf.ethz.ch>

Initial version of public stable barrelfish repository.