History log of /barrelfish-master/devices/omap/omap44xx_cortex_m3_nvic.dev
Revision Date Author Comments
# a99b6f3f 04-Sep-2013 Claudio Föllmi <foellmic@student.ethz.ch>

timer interrupts enabled

fixed interrupt handler writing to trap area for non-trap interrupts
enabled timer interrupts at reasonable intervals (reasonable for -O2 and no caches)
added system call for restoring a context (just for armv7-m, replacing a x86-specific interrupt),
because the ONLY way to restore an IT block is by exiting handler mode (there is literally no other mechanism)
(will only be called if userspace tries to restore a context that was saved by the kernel, and comes from interrupting an IT block or a ldm/stm instruction)

You may want to use -O2 from now on (because we use interrupts, and thrashing is possible)
The compiler we use will probably complain up to 3 times ("unable to find a register to spill in class 'GENERAL_REGS'")
just retry the faulting compile instruction with -O1, and then restart make


# b2445f25 28-Aug-2013 Claudio Föllmi <foellmic@student.ethz.ch>

updated devices around cortex-m3

fixed ro flag in mmu TTB
removed old autogenerated duplicate of mmu
added cortex-m3 nvic