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d9e1c4de |
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02-Feb-2012 |
Zeus Gómez Marmolejo <zeus.gomez@bsc.es> |
access the IOAPIC index register in 32-bit words
I've successfully booted Barrelfish on Bochs PC emulator with 1, 2 and 4
cores SMP emulation.
I had to do a fix in the Barrelfish code, regarding the IOAPIC index
register. According to the Intel datasheet, the IOAPIC (
http://www.intel.com/design/chipsets/datashts/290566.htm ) index register
has to be accessed only in 32-bit words (page 8). The Bochs code has an
assert preventing 8-bit access to the register. So the line to be modified
is in the file devices/lpc_ioapic.dev:
register ind rw addr(base, 0x0) "Index" type(uint32);
I send the patch. It seems to work in QEMU and in a real machine too.
Being able to run Barrelfish inside Bochs has several advantages.
1. Its execution is deterministic so if you find an error you can always
reproduce it in each execution in the same way. QEMU is indeterministic. I
was even discussing this in the QEMU mailing list and there is currently no
solution to this problem.
2. It has an embedded debugger and you can do physical address debugging,
the gdb stub in QEMU doesn't support.
[https://lists.inf.ethz.ch/pipermail/barrelfish-users/2012-February/000460.html]
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