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e1000_phy.c (205869) e1000_phy.c (213234)
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.c 205869 2010-03-29 23:36:34Z jfv $*/
33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.c 213234 2010-09-28 00:13:15Z jfv $*/
34
35#include "e1000_api.h"
36
37static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg);
38static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
39 u16 *data, bool read);
40static u32 e1000_get_phy_addr_for_hv_page(u32 page);
41static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

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276 goto out;
277 }
278 if (mdic & E1000_MDIC_ERROR) {
279 DEBUGOUT("MDI Error\n");
280 ret_val = -E1000_ERR_PHY;
281 goto out;
282 }
283 *data = (u16) mdic;
34
35#include "e1000_api.h"
36
37static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg);
38static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
39 u16 *data, bool read);
40static u32 e1000_get_phy_addr_for_hv_page(u32 page);
41static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

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276 goto out;
277 }
278 if (mdic & E1000_MDIC_ERROR) {
279 DEBUGOUT("MDI Error\n");
280 ret_val = -E1000_ERR_PHY;
281 goto out;
282 }
283 *data = (u16) mdic;
284
285 /*
286 * Allow some time after each MDIC transaction to avoid
287 * reading duplicate data in the next MDIC transaction.
288 */
289 if (hw->mac.type == e1000_pch2lan)
290 usec_delay(100);
284
285out:
286 return ret_val;
287}
288
289/**
290 * e1000_write_phy_reg_mdic - Write MDI control register
291 * @hw: pointer to the HW structure

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340 goto out;
341 }
342 if (mdic & E1000_MDIC_ERROR) {
343 DEBUGOUT("MDI Error\n");
344 ret_val = -E1000_ERR_PHY;
345 goto out;
346 }
347
291
292out:
293 return ret_val;
294}
295
296/**
297 * e1000_write_phy_reg_mdic - Write MDI control register
298 * @hw: pointer to the HW structure

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347 goto out;
348 }
349 if (mdic & E1000_MDIC_ERROR) {
350 DEBUGOUT("MDI Error\n");
351 ret_val = -E1000_ERR_PHY;
352 goto out;
353 }
354
355 /*
356 * Allow some time after each MDIC transaction to avoid
357 * reading duplicate data in the next MDIC transaction.
358 */
359 if (hw->mac.type == e1000_pch2lan)
360 usec_delay(100);
361
348out:
349 return ret_val;
350}
351
352/**
353 * e1000_read_phy_reg_i2c - Read PHY register using i2c
354 * @hw: pointer to the HW structure
355 * @offset: register offset to be read

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863 goto out;
864 }
865
866 /* Enable CRS on Tx. This must be set for half-duplex operation. */
867 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
868 if (ret_val)
869 goto out;
870
362out:
363 return ret_val;
364}
365
366/**
367 * e1000_read_phy_reg_i2c - Read PHY register using i2c
368 * @hw: pointer to the HW structure
369 * @offset: register offset to be read

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877 goto out;
878 }
879
880 /* Enable CRS on Tx. This must be set for half-duplex operation. */
881 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
882 if (ret_val)
883 goto out;
884
885 phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
871 /* For BM PHY this bit is downshift enable */
886 /* For BM PHY this bit is downshift enable */
872 if (phy->type != e1000_phy_bm)
873 phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
887 if (phy->type == e1000_phy_bm)
888 phy_data &= ~M88E1000_PSCR_ASSERT_CRS_ON_TX;
874
875 /*
876 * Options:
877 * MDI/MDI-X = 0 (default)
878 * 0 - Auto for all speeds
879 * 1 - MDI mode
880 * 2 - MDI-X mode
881 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)

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2613 phy_type = e1000_phy_bm;
2614 break;
2615 case I82578_E_PHY_ID:
2616 phy_type = e1000_phy_82578;
2617 break;
2618 case I82577_E_PHY_ID:
2619 phy_type = e1000_phy_82577;
2620 break;
889
890 /*
891 * Options:
892 * MDI/MDI-X = 0 (default)
893 * 0 - Auto for all speeds
894 * 1 - MDI mode
895 * 2 - MDI-X mode
896 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)

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2628 phy_type = e1000_phy_bm;
2629 break;
2630 case I82578_E_PHY_ID:
2631 phy_type = e1000_phy_82578;
2632 break;
2633 case I82577_E_PHY_ID:
2634 phy_type = e1000_phy_82577;
2635 break;
2636 case I82579_E_PHY_ID:
2637 phy_type = e1000_phy_82579;
2638 break;
2621 case I82580_I_PHY_ID:
2622 phy_type = e1000_phy_82580;
2623 break;
2624 default:
2625 phy_type = e1000_phy_unknown;
2626 break;
2627 }
2628 return phy_type;

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2639 case I82580_I_PHY_ID:
2640 phy_type = e1000_phy_82580;
2641 break;
2642 default:
2643 phy_type = e1000_phy_unknown;
2644 break;
2645 }
2646 return phy_type;

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