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e1000_80003es2lan.c (176667) e1000_80003es2lan.c (177867)
1/*******************************************************************************
1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,

--- 14 unchanged lines hidden (view full) ---

24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,

--- 14 unchanged lines hidden (view full) ---

24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/* $FreeBSD: head/sys/dev/em/e1000_80003es2lan.c 176667 2008-02-29 21:50:11Z jfv $ */
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_80003es2lan.c 177867 2008-04-02 22:00:36Z jfv $*/
34
34
35
36/* e1000_80003es2lan
37 */
38
39#include "e1000_api.h"
40#include "e1000_80003es2lan.h"
41
35/* e1000_80003es2lan
36 */
37
38#include "e1000_api.h"
39#include "e1000_80003es2lan.h"
40
42STATIC s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw);
43STATIC s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw);
44STATIC s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw);
45STATIC s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);
46STATIC void e1000_release_phy_80003es2lan(struct e1000_hw *hw);
47STATIC s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);
48STATIC void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);
49STATIC s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
41static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw);
42static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw);
43static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw);
44static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);
45static void e1000_release_phy_80003es2lan(struct e1000_hw *hw);
46static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);
47static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);
48static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
50 u32 offset,
51 u16 *data);
49 u32 offset,
50 u16 *data);
52STATIC s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
51static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
53 u32 offset,
54 u16 data);
52 u32 offset,
53 u16 data);
55STATIC s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
54static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
56 u16 words, u16 *data);
55 u16 words, u16 *data);
57STATIC s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);
58STATIC s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
59STATIC s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);
60STATIC s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
56static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);
57static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
58static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);
59static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
61 u16 *duplex);
60 u16 *duplex);
62STATIC s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);
63STATIC s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);
64STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
65STATIC void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
61static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);
62static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);
63static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
64static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
66static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
67static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
68static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
69static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
70static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
71static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
65static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
66static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
67static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
68static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
69static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
70static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
72STATIC s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);
73STATIC void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
71static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);
72static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
74
75/*
76 * A table for the GG82563 cable length where the range is defined
77 * with a lower bound at "index" and the upper bound at
78 * "index + 5".
79 */
80static const u16 e1000_gg82563_cable_length_table[] =
81 { 0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF };
82#define GG82563_CABLE_LENGTH_TABLE_SIZE \
83 (sizeof(e1000_gg82563_cable_length_table) / \
84 sizeof(e1000_gg82563_cable_length_table[0]))
85
86/**
87 * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
88 * @hw: pointer to the HW structure
89 *
90 * This is a function pointer entry point called by the api module.
91 **/
73
74/*
75 * A table for the GG82563 cable length where the range is defined
76 * with a lower bound at "index" and the upper bound at
77 * "index + 5".
78 */
79static const u16 e1000_gg82563_cable_length_table[] =
80 { 0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF };
81#define GG82563_CABLE_LENGTH_TABLE_SIZE \
82 (sizeof(e1000_gg82563_cable_length_table) / \
83 sizeof(e1000_gg82563_cable_length_table[0]))
84
85/**
86 * e1000_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
87 * @hw: pointer to the HW structure
88 *
89 * This is a function pointer entry point called by the api module.
90 **/
92STATIC s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
91static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
93{
94 struct e1000_phy_info *phy = &hw->phy;
92{
93 struct e1000_phy_info *phy = &hw->phy;
95 struct e1000_functions *func = &hw->func;
96 s32 ret_val = E1000_SUCCESS;
97
98 DEBUGFUNC("e1000_init_phy_params_80003es2lan");
99
100 if (hw->phy.media_type != e1000_media_type_copper) {
101 phy->type = e1000_phy_none;
102 goto out;
103 } else {
94 s32 ret_val = E1000_SUCCESS;
95
96 DEBUGFUNC("e1000_init_phy_params_80003es2lan");
97
98 if (hw->phy.media_type != e1000_media_type_copper) {
99 phy->type = e1000_phy_none;
100 goto out;
101 } else {
104 func->power_up_phy = e1000_power_up_phy_copper;
105 func->power_down_phy = e1000_power_down_phy_copper_80003es2lan;
102 phy->ops.power_up = e1000_power_up_phy_copper;
103 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
106 }
107
108 phy->addr = 1;
109 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
110 phy->reset_delay_us = 100;
111 phy->type = e1000_phy_gg82563;
112
104 }
105
106 phy->addr = 1;
107 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
108 phy->reset_delay_us = 100;
109 phy->type = e1000_phy_gg82563;
110
113 func->acquire_phy = e1000_acquire_phy_80003es2lan;
114 func->check_polarity = e1000_check_polarity_m88;
115 func->check_reset_block = e1000_check_reset_block_generic;
116 func->commit_phy = e1000_phy_sw_reset_generic;
117 func->get_cfg_done = e1000_get_cfg_done_80003es2lan;
118 func->get_phy_info = e1000_get_phy_info_m88;
119 func->release_phy = e1000_release_phy_80003es2lan;
120 func->reset_phy = e1000_phy_hw_reset_generic;
121 func->set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
111 phy->ops.acquire = e1000_acquire_phy_80003es2lan;
112 phy->ops.check_polarity = e1000_check_polarity_m88;
113 phy->ops.check_reset_block = e1000_check_reset_block_generic;
114 phy->ops.commit = e1000_phy_sw_reset_generic;
115 phy->ops.get_cfg_done = e1000_get_cfg_done_80003es2lan;
116 phy->ops.get_info = e1000_get_phy_info_m88;
117 phy->ops.release = e1000_release_phy_80003es2lan;
118 phy->ops.reset = e1000_phy_hw_reset_generic;
119 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
122
120
123 func->force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
124 func->get_cable_length = e1000_get_cable_length_80003es2lan;
125 func->read_phy_reg = e1000_read_phy_reg_gg82563_80003es2lan;
126 func->write_phy_reg = e1000_write_phy_reg_gg82563_80003es2lan;
121 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_80003es2lan;
122 phy->ops.get_cable_length = e1000_get_cable_length_80003es2lan;
123 phy->ops.read_reg = e1000_read_phy_reg_gg82563_80003es2lan;
124 phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan;
127
128 /* This can only be done after all function pointers are setup. */
129 ret_val = e1000_get_phy_id(hw);
130
131 /* Verify phy id */
132 if (phy->id != GG82563_E_PHY_ID) {
133 ret_val = -E1000_ERR_PHY;
134 goto out;

--- 4 unchanged lines hidden (view full) ---

139}
140
141/**
142 * e1000_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
143 * @hw: pointer to the HW structure
144 *
145 * This is a function pointer entry point called by the api module.
146 **/
125
126 /* This can only be done after all function pointers are setup. */
127 ret_val = e1000_get_phy_id(hw);
128
129 /* Verify phy id */
130 if (phy->id != GG82563_E_PHY_ID) {
131 ret_val = -E1000_ERR_PHY;
132 goto out;

--- 4 unchanged lines hidden (view full) ---

137}
138
139/**
140 * e1000_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
141 * @hw: pointer to the HW structure
142 *
143 * This is a function pointer entry point called by the api module.
144 **/
147STATIC s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
145static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
148{
149 struct e1000_nvm_info *nvm = &hw->nvm;
146{
147 struct e1000_nvm_info *nvm = &hw->nvm;
150 struct e1000_functions *func = &hw->func;
151 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
152 u16 size;
153
154 DEBUGFUNC("e1000_init_nvm_params_80003es2lan");
155
156 nvm->opcode_bits = 8;
157 nvm->delay_usec = 1;
158 switch (nvm->override) {

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182 size += NVM_WORD_SIZE_BASE_SHIFT;
183
184 /* EEPROM access above 16k is unsupported */
185 if (size > 14)
186 size = 14;
187 nvm->word_size = 1 << size;
188
189 /* Function Pointers */
148 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
149 u16 size;
150
151 DEBUGFUNC("e1000_init_nvm_params_80003es2lan");
152
153 nvm->opcode_bits = 8;
154 nvm->delay_usec = 1;
155 switch (nvm->override) {

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179 size += NVM_WORD_SIZE_BASE_SHIFT;
180
181 /* EEPROM access above 16k is unsupported */
182 if (size > 14)
183 size = 14;
184 nvm->word_size = 1 << size;
185
186 /* Function Pointers */
190 func->acquire_nvm = e1000_acquire_nvm_80003es2lan;
191 func->read_nvm = e1000_read_nvm_eerd;
192 func->release_nvm = e1000_release_nvm_80003es2lan;
193 func->update_nvm = e1000_update_nvm_checksum_generic;
194 func->valid_led_default = e1000_valid_led_default_generic;
195 func->validate_nvm = e1000_validate_nvm_checksum_generic;
196 func->write_nvm = e1000_write_nvm_80003es2lan;
187 nvm->ops.acquire = e1000_acquire_nvm_80003es2lan;
188 nvm->ops.read = e1000_read_nvm_eerd;
189 nvm->ops.release = e1000_release_nvm_80003es2lan;
190 nvm->ops.update = e1000_update_nvm_checksum_generic;
191 nvm->ops.valid_led_default = e1000_valid_led_default_generic;
192 nvm->ops.validate = e1000_validate_nvm_checksum_generic;
193 nvm->ops.write = e1000_write_nvm_80003es2lan;
197
198 return E1000_SUCCESS;
199}
200
201/**
202 * e1000_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
203 * @hw: pointer to the HW structure
204 *
205 * This is a function pointer entry point called by the api module.
206 **/
194
195 return E1000_SUCCESS;
196}
197
198/**
199 * e1000_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
200 * @hw: pointer to the HW structure
201 *
202 * This is a function pointer entry point called by the api module.
203 **/
207STATIC s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
204static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
208{
209 struct e1000_mac_info *mac = &hw->mac;
205{
206 struct e1000_mac_info *mac = &hw->mac;
210 struct e1000_functions *func = &hw->func;
211 s32 ret_val = E1000_SUCCESS;
212
213 DEBUGFUNC("e1000_init_mac_params_80003es2lan");
214
215 /* Set media type */
216 switch (hw->device_id) {
217 case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
218 hw->phy.media_type = e1000_media_type_internal_serdes;

--- 12 unchanged lines hidden (view full) ---

231 /* Set if manageability features are enabled. */
232 mac->arc_subsystem_valid =
233 (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
234 ? TRUE : FALSE;
235
236 /* Function pointers */
237
238 /* bus type/speed/width */
207 s32 ret_val = E1000_SUCCESS;
208
209 DEBUGFUNC("e1000_init_mac_params_80003es2lan");
210
211 /* Set media type */
212 switch (hw->device_id) {
213 case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
214 hw->phy.media_type = e1000_media_type_internal_serdes;

--- 12 unchanged lines hidden (view full) ---

227 /* Set if manageability features are enabled. */
228 mac->arc_subsystem_valid =
229 (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
230 ? TRUE : FALSE;
231
232 /* Function pointers */
233
234 /* bus type/speed/width */
239 func->get_bus_info = e1000_get_bus_info_pcie_generic;
235 mac->ops.get_bus_info = e1000_get_bus_info_pcie_generic;
240 /* reset */
236 /* reset */
241 func->reset_hw = e1000_reset_hw_80003es2lan;
237 mac->ops.reset_hw = e1000_reset_hw_80003es2lan;
242 /* hw initialization */
238 /* hw initialization */
243 func->init_hw = e1000_init_hw_80003es2lan;
239 mac->ops.init_hw = e1000_init_hw_80003es2lan;
244 /* link setup */
240 /* link setup */
245 func->setup_link = e1000_setup_link_generic;
241 mac->ops.setup_link = e1000_setup_link_generic;
246 /* physical interface link setup */
242 /* physical interface link setup */
247 func->setup_physical_interface =
243 mac->ops.setup_physical_interface =
248 (hw->phy.media_type == e1000_media_type_copper)
249 ? e1000_setup_copper_link_80003es2lan
250 : e1000_setup_fiber_serdes_link_generic;
251 /* check for link */
252 switch (hw->phy.media_type) {
253 case e1000_media_type_copper:
244 (hw->phy.media_type == e1000_media_type_copper)
245 ? e1000_setup_copper_link_80003es2lan
246 : e1000_setup_fiber_serdes_link_generic;
247 /* check for link */
248 switch (hw->phy.media_type) {
249 case e1000_media_type_copper:
254 func->check_for_link = e1000_check_for_copper_link_generic;
250 mac->ops.check_for_link = e1000_check_for_copper_link_generic;
255 break;
256 case e1000_media_type_fiber:
251 break;
252 case e1000_media_type_fiber:
257 func->check_for_link = e1000_check_for_fiber_link_generic;
253 mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
258 break;
259 case e1000_media_type_internal_serdes:
254 break;
255 case e1000_media_type_internal_serdes:
260 func->check_for_link = e1000_check_for_serdes_link_generic;
256 mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
261 break;
262 default:
263 ret_val = -E1000_ERR_CONFIG;
264 goto out;
265 break;
266 }
267 /* check management mode */
257 break;
258 default:
259 ret_val = -E1000_ERR_CONFIG;
260 goto out;
261 break;
262 }
263 /* check management mode */
268 func->check_mng_mode = e1000_check_mng_mode_generic;
264 mac->ops.check_mng_mode = e1000_check_mng_mode_generic;
269 /* multicast address update */
265 /* multicast address update */
270 func->update_mc_addr_list = e1000_update_mc_addr_list_generic;
266 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
271 /* writing VFTA */
267 /* writing VFTA */
272 func->write_vfta = e1000_write_vfta_generic;
268 mac->ops.write_vfta = e1000_write_vfta_generic;
273 /* clearing VFTA */
269 /* clearing VFTA */
274 func->clear_vfta = e1000_clear_vfta_generic;
270 mac->ops.clear_vfta = e1000_clear_vfta_generic;
275 /* setting MTA */
271 /* setting MTA */
276 func->mta_set = e1000_mta_set_generic;
272 mac->ops.mta_set = e1000_mta_set_generic;
277 /* read mac address */
273 /* read mac address */
278 func->read_mac_addr = e1000_read_mac_addr_80003es2lan;
274 mac->ops.read_mac_addr = e1000_read_mac_addr_80003es2lan;
279 /* blink LED */
275 /* blink LED */
280 func->blink_led = e1000_blink_led_generic;
276 mac->ops.blink_led = e1000_blink_led_generic;
281 /* setup LED */
277 /* setup LED */
282 func->setup_led = e1000_setup_led_generic;
278 mac->ops.setup_led = e1000_setup_led_generic;
283 /* cleanup LED */
279 /* cleanup LED */
284 func->cleanup_led = e1000_cleanup_led_generic;
280 mac->ops.cleanup_led = e1000_cleanup_led_generic;
285 /* turn on/off LED */
281 /* turn on/off LED */
286 func->led_on = e1000_led_on_generic;
287 func->led_off = e1000_led_off_generic;
282 mac->ops.led_on = e1000_led_on_generic;
283 mac->ops.led_off = e1000_led_off_generic;
288 /* remove device */
284 /* remove device */
289 func->remove_device = e1000_remove_device_generic;
285 mac->ops.remove_device = e1000_remove_device_generic;
290 /* clear hardware counters */
286 /* clear hardware counters */
291 func->clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
287 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_80003es2lan;
292 /* link info */
288 /* link info */
293 func->get_link_up_info = e1000_get_link_up_info_80003es2lan;
289 mac->ops.get_link_up_info = e1000_get_link_up_info_80003es2lan;
294
295out:
296 return ret_val;
297}
298
299/**
300 * e1000_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
301 * @hw: pointer to the HW structure
302 *
303 * The only function explicitly called by the api module to initialize
304 * all function pointers and parameters.
305 **/
306void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)
307{
308 DEBUGFUNC("e1000_init_function_pointers_80003es2lan");
309
290
291out:
292 return ret_val;
293}
294
295/**
296 * e1000_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
297 * @hw: pointer to the HW structure
298 *
299 * The only function explicitly called by the api module to initialize
300 * all function pointers and parameters.
301 **/
302void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)
303{
304 DEBUGFUNC("e1000_init_function_pointers_80003es2lan");
305
310 hw->func.init_mac_params = e1000_init_mac_params_80003es2lan;
311 hw->func.init_nvm_params = e1000_init_nvm_params_80003es2lan;
312 hw->func.init_phy_params = e1000_init_phy_params_80003es2lan;
306 hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;
307 hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;
308 hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;
313}
314
315/**
316 * e1000_acquire_phy_80003es2lan - Acquire rights to access PHY
317 * @hw: pointer to the HW structure
318 *
319 * A wrapper to acquire access rights to the correct PHY. This is a
320 * function pointer entry point called by the api module.
321 **/
309}
310
311/**
312 * e1000_acquire_phy_80003es2lan - Acquire rights to access PHY
313 * @hw: pointer to the HW structure
314 *
315 * A wrapper to acquire access rights to the correct PHY. This is a
316 * function pointer entry point called by the api module.
317 **/
322STATIC s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
318static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
323{
324 u16 mask;
325
326 DEBUGFUNC("e1000_acquire_phy_80003es2lan");
327
328 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
329 mask |= E1000_SWFW_CSR_SM;
330
331 return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
332}
333
334/**
335 * e1000_release_phy_80003es2lan - Release rights to access PHY
336 * @hw: pointer to the HW structure
337 *
338 * A wrapper to release access rights to the correct PHY. This is a
339 * function pointer entry point called by the api module.
340 **/
319{
320 u16 mask;
321
322 DEBUGFUNC("e1000_acquire_phy_80003es2lan");
323
324 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
325 mask |= E1000_SWFW_CSR_SM;
326
327 return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
328}
329
330/**
331 * e1000_release_phy_80003es2lan - Release rights to access PHY
332 * @hw: pointer to the HW structure
333 *
334 * A wrapper to release access rights to the correct PHY. This is a
335 * function pointer entry point called by the api module.
336 **/
341STATIC void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
337static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
342{
343 u16 mask;
344
345 DEBUGFUNC("e1000_release_phy_80003es2lan");
346
347 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
348 mask |= E1000_SWFW_CSR_SM;
349
350 e1000_release_swfw_sync_80003es2lan(hw, mask);
351}
352
353/**
354 * e1000_acquire_nvm_80003es2lan - Acquire rights to access NVM
355 * @hw: pointer to the HW structure
356 *
357 * Acquire the semaphore to access the EEPROM. This is a function
358 * pointer entry point called by the api module.
359 **/
338{
339 u16 mask;
340
341 DEBUGFUNC("e1000_release_phy_80003es2lan");
342
343 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
344 mask |= E1000_SWFW_CSR_SM;
345
346 e1000_release_swfw_sync_80003es2lan(hw, mask);
347}
348
349/**
350 * e1000_acquire_nvm_80003es2lan - Acquire rights to access NVM
351 * @hw: pointer to the HW structure
352 *
353 * Acquire the semaphore to access the EEPROM. This is a function
354 * pointer entry point called by the api module.
355 **/
360STATIC s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)
356static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)
361{
362 s32 ret_val;
363
364 DEBUGFUNC("e1000_acquire_nvm_80003es2lan");
365
366 ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
367 if (ret_val)
368 goto out;

--- 9 unchanged lines hidden (view full) ---

378
379/**
380 * e1000_release_nvm_80003es2lan - Relinquish rights to access NVM
381 * @hw: pointer to the HW structure
382 *
383 * Release the semaphore used to access the EEPROM. This is a
384 * function pointer entry point called by the api module.
385 **/
357{
358 s32 ret_val;
359
360 DEBUGFUNC("e1000_acquire_nvm_80003es2lan");
361
362 ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
363 if (ret_val)
364 goto out;

--- 9 unchanged lines hidden (view full) ---

374
375/**
376 * e1000_release_nvm_80003es2lan - Relinquish rights to access NVM
377 * @hw: pointer to the HW structure
378 *
379 * Release the semaphore used to access the EEPROM. This is a
380 * function pointer entry point called by the api module.
381 **/
386STATIC void e1000_release_nvm_80003es2lan(struct e1000_hw *hw)
382static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw)
387{
388 DEBUGFUNC("e1000_release_nvm_80003es2lan");
389
390 e1000_release_nvm_generic(hw);
391 e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
392}
393
394/**

--- 76 unchanged lines hidden (view full) ---

471 * e1000_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
472 * @hw: pointer to the HW structure
473 * @offset: offset of the register to read
474 * @data: pointer to the data returned from the operation
475 *
476 * Read the GG82563 PHY register. This is a function pointer entry
477 * point called by the api module.
478 **/
383{
384 DEBUGFUNC("e1000_release_nvm_80003es2lan");
385
386 e1000_release_nvm_generic(hw);
387 e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
388}
389
390/**

--- 76 unchanged lines hidden (view full) ---

467 * e1000_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
468 * @hw: pointer to the HW structure
469 * @offset: offset of the register to read
470 * @data: pointer to the data returned from the operation
471 *
472 * Read the GG82563 PHY register. This is a function pointer entry
473 * point called by the api module.
474 **/
479STATIC s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
475static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
480 u32 offset, u16 *data)
481{
482 s32 ret_val;
483 u32 page_select;
484 u16 temp;
485
486 DEBUGFUNC("e1000_read_phy_reg_gg82563_80003es2lan");
487

--- 52 unchanged lines hidden (view full) ---

540 * e1000_write_phy_reg_gg82563_80003es2lan - Write GG82563 PHY register
541 * @hw: pointer to the HW structure
542 * @offset: offset of the register to read
543 * @data: value to write to the register
544 *
545 * Write to the GG82563 PHY register. This is a function pointer entry
546 * point called by the api module.
547 **/
476 u32 offset, u16 *data)
477{
478 s32 ret_val;
479 u32 page_select;
480 u16 temp;
481
482 DEBUGFUNC("e1000_read_phy_reg_gg82563_80003es2lan");
483

--- 52 unchanged lines hidden (view full) ---

536 * e1000_write_phy_reg_gg82563_80003es2lan - Write GG82563 PHY register
537 * @hw: pointer to the HW structure
538 * @offset: offset of the register to read
539 * @data: value to write to the register
540 *
541 * Write to the GG82563 PHY register. This is a function pointer entry
542 * point called by the api module.
543 **/
548STATIC s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
544static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
549 u32 offset, u16 data)
550{
551 s32 ret_val;
552 u32 page_select;
553 u16 temp;
554
555 DEBUGFUNC("e1000_write_phy_reg_gg82563_80003es2lan");
556

--- 54 unchanged lines hidden (view full) ---

611 * @hw: pointer to the HW structure
612 * @offset: offset of the register to read
613 * @words: number of words to write
614 * @data: buffer of data to write to the NVM
615 *
616 * Write "words" of data to the ESB2 NVM. This is a function
617 * pointer entry point called by the api module.
618 **/
545 u32 offset, u16 data)
546{
547 s32 ret_val;
548 u32 page_select;
549 u16 temp;
550
551 DEBUGFUNC("e1000_write_phy_reg_gg82563_80003es2lan");
552

--- 54 unchanged lines hidden (view full) ---

607 * @hw: pointer to the HW structure
608 * @offset: offset of the register to read
609 * @words: number of words to write
610 * @data: buffer of data to write to the NVM
611 *
612 * Write "words" of data to the ESB2 NVM. This is a function
613 * pointer entry point called by the api module.
614 **/
619STATIC s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
615static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
620 u16 words, u16 *data)
621{
622 DEBUGFUNC("e1000_write_nvm_80003es2lan");
623
624 return e1000_write_nvm_spi(hw, offset, words, data);
625}
626
627/**
628 * e1000_get_cfg_done_80003es2lan - Wait for configuration to complete
629 * @hw: pointer to the HW structure
630 *
631 * Wait a specific amount of time for manageability processes to complete.
632 * This is a function pointer entry point called by the phy module.
633 **/
616 u16 words, u16 *data)
617{
618 DEBUGFUNC("e1000_write_nvm_80003es2lan");
619
620 return e1000_write_nvm_spi(hw, offset, words, data);
621}
622
623/**
624 * e1000_get_cfg_done_80003es2lan - Wait for configuration to complete
625 * @hw: pointer to the HW structure
626 *
627 * Wait a specific amount of time for manageability processes to complete.
628 * This is a function pointer entry point called by the phy module.
629 **/
634STATIC s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
630static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
635{
636 s32 timeout = PHY_CFG_TIMEOUT;
637 s32 ret_val = E1000_SUCCESS;
638 u32 mask = E1000_NVM_CFG_DONE_PORT_0;
639
640 DEBUGFUNC("e1000_get_cfg_done_80003es2lan");
641
642 if (hw->bus.func == 1)

--- 17 unchanged lines hidden (view full) ---

660
661/**
662 * e1000_phy_force_speed_duplex_80003es2lan - Force PHY speed and duplex
663 * @hw: pointer to the HW structure
664 *
665 * Force the speed and duplex settings onto the PHY. This is a
666 * function pointer entry point called by the phy module.
667 **/
631{
632 s32 timeout = PHY_CFG_TIMEOUT;
633 s32 ret_val = E1000_SUCCESS;
634 u32 mask = E1000_NVM_CFG_DONE_PORT_0;
635
636 DEBUGFUNC("e1000_get_cfg_done_80003es2lan");
637
638 if (hw->bus.func == 1)

--- 17 unchanged lines hidden (view full) ---

656
657/**
658 * e1000_phy_force_speed_duplex_80003es2lan - Force PHY speed and duplex
659 * @hw: pointer to the HW structure
660 *
661 * Force the speed and duplex settings onto the PHY. This is a
662 * function pointer entry point called by the phy module.
663 **/
668STATIC s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
664static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
669{
665{
670 s32 ret_val;
666 s32 ret_val = E1000_SUCCESS;
671 u16 phy_data;
672 bool link;
673
674 DEBUGFUNC("e1000_phy_force_speed_duplex_80003es2lan");
675
667 u16 phy_data;
668 bool link;
669
670 DEBUGFUNC("e1000_phy_force_speed_duplex_80003es2lan");
671
672 if (!(hw->phy.ops.read_reg))
673 goto out;
674
676 /*
677 * Clear Auto-Crossover to force MDI manually. M88E1000 requires MDI
678 * forced whenever speed and duplex are forced.
679 */
675 /*
676 * Clear Auto-Crossover to force MDI manually. M88E1000 requires MDI
677 * forced whenever speed and duplex are forced.
678 */
680 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
679 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
681 if (ret_val)
682 goto out;
683
684 phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO;
680 if (ret_val)
681 goto out;
682
683 phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO;
685 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
684 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
686 if (ret_val)
687 goto out;
688
689 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data);
690
685 if (ret_val)
686 goto out;
687
688 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data);
689
691 ret_val = e1000_read_phy_reg(hw, PHY_CONTROL, &phy_data);
690 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
692 if (ret_val)
693 goto out;
694
695 e1000_phy_force_speed_duplex_setup(hw, &phy_data);
696
697 /* Reset the phy to commit changes. */
698 phy_data |= MII_CR_RESET;
699
691 if (ret_val)
692 goto out;
693
694 e1000_phy_force_speed_duplex_setup(hw, &phy_data);
695
696 /* Reset the phy to commit changes. */
697 phy_data |= MII_CR_RESET;
698
700 ret_val = e1000_write_phy_reg(hw, PHY_CONTROL, phy_data);
699 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
701 if (ret_val)
702 goto out;
703
704 usec_delay(1);
705
706 if (hw->phy.autoneg_wait_to_complete) {
707 DEBUGOUT("Waiting for forced speed/duplex link "
708 "on GG82563 phy.\n");

--- 15 unchanged lines hidden (view full) ---

724
725 /* Try once more */
726 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
727 100000, &link);
728 if (ret_val)
729 goto out;
730 }
731
700 if (ret_val)
701 goto out;
702
703 usec_delay(1);
704
705 if (hw->phy.autoneg_wait_to_complete) {
706 DEBUGOUT("Waiting for forced speed/duplex link "
707 "on GG82563 phy.\n");

--- 15 unchanged lines hidden (view full) ---

723
724 /* Try once more */
725 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
726 100000, &link);
727 if (ret_val)
728 goto out;
729 }
730
732 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
731 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
733 if (ret_val)
734 goto out;
735
736 /*
737 * Resetting the phy means we need to verify the TX_CLK corresponds
738 * to the link speed. 10Mbps -> 2.5MHz, else 25MHz.
739 */
740 phy_data &= ~GG82563_MSCR_TX_CLK_MASK;
741 if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
742 phy_data |= GG82563_MSCR_TX_CLK_10MBPS_2_5;
743 else
744 phy_data |= GG82563_MSCR_TX_CLK_100MBPS_25;
745
746 /*
747 * In addition, we must re-enable CRS on Tx for both half and full
748 * duplex.
749 */
750 phy_data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
732 if (ret_val)
733 goto out;
734
735 /*
736 * Resetting the phy means we need to verify the TX_CLK corresponds
737 * to the link speed. 10Mbps -> 2.5MHz, else 25MHz.
738 */
739 phy_data &= ~GG82563_MSCR_TX_CLK_MASK;
740 if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
741 phy_data |= GG82563_MSCR_TX_CLK_10MBPS_2_5;
742 else
743 phy_data |= GG82563_MSCR_TX_CLK_100MBPS_25;
744
745 /*
746 * In addition, we must re-enable CRS on Tx for both half and full
747 * duplex.
748 */
749 phy_data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
751 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
750 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
752
753out:
754 return ret_val;
755}
756
757/**
758 * e1000_get_cable_length_80003es2lan - Set approximate cable length
759 * @hw: pointer to the HW structure
760 *
761 * Find the approximate cable length as measured by the GG82563 PHY.
762 * This is a function pointer entry point called by the phy module.
763 **/
751
752out:
753 return ret_val;
754}
755
756/**
757 * e1000_get_cable_length_80003es2lan - Set approximate cable length
758 * @hw: pointer to the HW structure
759 *
760 * Find the approximate cable length as measured by the GG82563 PHY.
761 * This is a function pointer entry point called by the phy module.
762 **/
764STATIC s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)
763static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)
765{
766 struct e1000_phy_info *phy = &hw->phy;
764{
765 struct e1000_phy_info *phy = &hw->phy;
767 s32 ret_val;
766 s32 ret_val = E1000_SUCCESS;
768 u16 phy_data, index;
769
770 DEBUGFUNC("e1000_get_cable_length_80003es2lan");
771
767 u16 phy_data, index;
768
769 DEBUGFUNC("e1000_get_cable_length_80003es2lan");
770
772 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
771 if (!(hw->phy.ops.read_reg))
772 goto out;
773
774 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
773 if (ret_val)
774 goto out;
775
776 index = phy_data & GG82563_DSPD_CABLE_LENGTH;
777 phy->min_cable_length = e1000_gg82563_cable_length_table[index];
778 phy->max_cable_length = e1000_gg82563_cable_length_table[index+5];
779
780 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;

--- 6 unchanged lines hidden (view full) ---

787 * e1000_get_link_up_info_80003es2lan - Report speed and duplex
788 * @hw: pointer to the HW structure
789 * @speed: pointer to speed buffer
790 * @duplex: pointer to duplex buffer
791 *
792 * Retrieve the current speed and duplex configuration.
793 * This is a function pointer entry point called by the api module.
794 **/
775 if (ret_val)
776 goto out;
777
778 index = phy_data & GG82563_DSPD_CABLE_LENGTH;
779 phy->min_cable_length = e1000_gg82563_cable_length_table[index];
780 phy->max_cable_length = e1000_gg82563_cable_length_table[index+5];
781
782 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;

--- 6 unchanged lines hidden (view full) ---

789 * e1000_get_link_up_info_80003es2lan - Report speed and duplex
790 * @hw: pointer to the HW structure
791 * @speed: pointer to speed buffer
792 * @duplex: pointer to duplex buffer
793 *
794 * Retrieve the current speed and duplex configuration.
795 * This is a function pointer entry point called by the api module.
796 **/
795STATIC s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
797static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
796 u16 *duplex)
797{
798 s32 ret_val;
799
800 DEBUGFUNC("e1000_get_link_up_info_80003es2lan");
801
802 if (hw->phy.media_type == e1000_media_type_copper) {
803 ret_val = e1000_get_speed_and_duplex_copper_generic(hw,

--- 18 unchanged lines hidden (view full) ---

822
823/**
824 * e1000_reset_hw_80003es2lan - Reset the ESB2 controller
825 * @hw: pointer to the HW structure
826 *
827 * Perform a global reset to the ESB2 controller.
828 * This is a function pointer entry point called by the api module.
829 **/
798 u16 *duplex)
799{
800 s32 ret_val;
801
802 DEBUGFUNC("e1000_get_link_up_info_80003es2lan");
803
804 if (hw->phy.media_type == e1000_media_type_copper) {
805 ret_val = e1000_get_speed_and_duplex_copper_generic(hw,

--- 18 unchanged lines hidden (view full) ---

824
825/**
826 * e1000_reset_hw_80003es2lan - Reset the ESB2 controller
827 * @hw: pointer to the HW structure
828 *
829 * Perform a global reset to the ESB2 controller.
830 * This is a function pointer entry point called by the api module.
831 **/
830STATIC s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
832static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
831{
832 u32 ctrl, icr;
833 s32 ret_val;
834
835 DEBUGFUNC("e1000_reset_hw_80003es2lan");
836
837 /*
838 * Prevent the PCI-E bus from sticking if there is no TLP connection

--- 35 unchanged lines hidden (view full) ---

874
875/**
876 * e1000_init_hw_80003es2lan - Initialize the ESB2 controller
877 * @hw: pointer to the HW structure
878 *
879 * Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
880 * This is a function pointer entry point called by the api module.
881 **/
833{
834 u32 ctrl, icr;
835 s32 ret_val;
836
837 DEBUGFUNC("e1000_reset_hw_80003es2lan");
838
839 /*
840 * Prevent the PCI-E bus from sticking if there is no TLP connection

--- 35 unchanged lines hidden (view full) ---

876
877/**
878 * e1000_init_hw_80003es2lan - Initialize the ESB2 controller
879 * @hw: pointer to the HW structure
880 *
881 * Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
882 * This is a function pointer entry point called by the api module.
883 **/
882STATIC s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
884static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
883{
884 struct e1000_mac_info *mac = &hw->mac;
885 u32 reg_data;
886 s32 ret_val;
887 u16 i;
888
889 DEBUGFUNC("e1000_init_hw_80003es2lan");
890
891 e1000_initialize_hw_bits_80003es2lan(hw);
892
893 /* Initialize identification LED */
894 ret_val = e1000_id_led_init_generic(hw);
895 if (ret_val) {
896 DEBUGOUT("Error initializing identification LED\n");
897 /* This is not fatal and we should not stop init due to this */
898 }
899
900 /* Disabling VLAN filtering */
901 DEBUGOUT("Initializing the IEEE VLAN\n");
885{
886 struct e1000_mac_info *mac = &hw->mac;
887 u32 reg_data;
888 s32 ret_val;
889 u16 i;
890
891 DEBUGFUNC("e1000_init_hw_80003es2lan");
892
893 e1000_initialize_hw_bits_80003es2lan(hw);
894
895 /* Initialize identification LED */
896 ret_val = e1000_id_led_init_generic(hw);
897 if (ret_val) {
898 DEBUGOUT("Error initializing identification LED\n");
899 /* This is not fatal and we should not stop init due to this */
900 }
901
902 /* Disabling VLAN filtering */
903 DEBUGOUT("Initializing the IEEE VLAN\n");
902 e1000_clear_vfta(hw);
904 mac->ops.clear_vfta(hw);
903
904 /* Setup the receive address. */
905 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
906
907 /* Zero out the Multicast HASH table */
908 DEBUGOUT("Zeroing the MTA\n");
909 for (i = 0; i < mac->mta_reg_count; i++)
910 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
911
912 /* Setup link and flow control */
905
906 /* Setup the receive address. */
907 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
908
909 /* Zero out the Multicast HASH table */
910 DEBUGOUT("Zeroing the MTA\n");
911 for (i = 0; i < mac->mta_reg_count; i++)
912 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
913
914 /* Setup link and flow control */
913 ret_val = e1000_setup_link(hw);
915 ret_val = mac->ops.setup_link(hw);
914
915 /* Set the transmit descriptor write-back policy */
916 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));
917 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
918 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
919 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);
920
921 /* ...for both queues. */

--- 90 unchanged lines hidden (view full) ---

1012 s32 ret_val;
1013 u32 ctrl_ext;
1014 u32 i = 0;
1015 u16 data, data2;
1016
1017 DEBUGFUNC("e1000_copper_link_setup_gg82563_80003es2lan");
1018
1019 if (!phy->reset_disable) {
916
917 /* Set the transmit descriptor write-back policy */
918 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));
919 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
920 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
921 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);
922
923 /* ...for both queues. */

--- 90 unchanged lines hidden (view full) ---

1014 s32 ret_val;
1015 u32 ctrl_ext;
1016 u32 i = 0;
1017 u16 data, data2;
1018
1019 DEBUGFUNC("e1000_copper_link_setup_gg82563_80003es2lan");
1020
1021 if (!phy->reset_disable) {
1020 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1022 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1021 &data);
1022 if (ret_val)
1023 goto out;
1024
1025 data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
1026 /* Use 25MHz for both link down and 1000Base-T for Tx clock. */
1027 data |= GG82563_MSCR_TX_CLK_1000MBPS_25;
1028
1023 &data);
1024 if (ret_val)
1025 goto out;
1026
1027 data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
1028 /* Use 25MHz for both link down and 1000Base-T for Tx clock. */
1029 data |= GG82563_MSCR_TX_CLK_1000MBPS_25;
1030
1029 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1031 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1030 data);
1031 if (ret_val)
1032 goto out;
1033
1034 /*
1035 * Options:
1036 * MDI/MDI-X = 0 (default)
1037 * 0 - Auto for all speeds
1038 * 1 - MDI mode
1039 * 2 - MDI-X mode
1040 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
1041 */
1032 data);
1033 if (ret_val)
1034 goto out;
1035
1036 /*
1037 * Options:
1038 * MDI/MDI-X = 0 (default)
1039 * 0 - Auto for all speeds
1040 * 1 - MDI mode
1041 * 2 - MDI-X mode
1042 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
1043 */
1042 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_SPEC_CTRL, &data);
1044 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data);
1043 if (ret_val)
1044 goto out;
1045
1046 data &= ~GG82563_PSCR_CROSSOVER_MODE_MASK;
1047
1048 switch (phy->mdix) {
1049 case 1:
1050 data |= GG82563_PSCR_CROSSOVER_MODE_MDI;

--- 13 unchanged lines hidden (view full) ---

1064 * Automatic Correction for Reversed Cable Polarity
1065 * 0 - Disabled
1066 * 1 - Enabled
1067 */
1068 data &= ~GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
1069 if (phy->disable_polarity_correction)
1070 data |= GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
1071
1045 if (ret_val)
1046 goto out;
1047
1048 data &= ~GG82563_PSCR_CROSSOVER_MODE_MASK;
1049
1050 switch (phy->mdix) {
1051 case 1:
1052 data |= GG82563_PSCR_CROSSOVER_MODE_MDI;

--- 13 unchanged lines hidden (view full) ---

1066 * Automatic Correction for Reversed Cable Polarity
1067 * 0 - Disabled
1068 * 1 - Enabled
1069 */
1070 data &= ~GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
1071 if (phy->disable_polarity_correction)
1072 data |= GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
1073
1072 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_SPEC_CTRL, data);
1074 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data);
1073 if (ret_val)
1074 goto out;
1075
1076 /* SW Reset the PHY so all changes take effect */
1075 if (ret_val)
1076 goto out;
1077
1078 /* SW Reset the PHY so all changes take effect */
1077 ret_val = e1000_phy_commit(hw);
1079 ret_val = hw->phy.ops.commit(hw);
1078 if (ret_val) {
1079 DEBUGOUT("Error Resetting the PHY\n");
1080 goto out;
1081 }
1082
1083 }
1084
1085 /* Bypass Rx and Tx FIFO's */

--- 11 unchanged lines hidden (view full) ---

1097 goto out;
1098 data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
1099 ret_val = e1000_write_kmrn_reg(hw,
1100 E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
1101 data);
1102 if (ret_val)
1103 goto out;
1104
1080 if (ret_val) {
1081 DEBUGOUT("Error Resetting the PHY\n");
1082 goto out;
1083 }
1084
1085 }
1086
1087 /* Bypass Rx and Tx FIFO's */

--- 11 unchanged lines hidden (view full) ---

1099 goto out;
1100 data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
1101 ret_val = e1000_write_kmrn_reg(hw,
1102 E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
1103 data);
1104 if (ret_val)
1105 goto out;
1106
1105 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data);
1107 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data);
1106 if (ret_val)
1107 goto out;
1108
1109 data &= ~GG82563_PSCR2_REVERSE_AUTO_NEG;
1108 if (ret_val)
1109 goto out;
1110
1111 data &= ~GG82563_PSCR2_REVERSE_AUTO_NEG;
1110 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);
1112 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);
1111 if (ret_val)
1112 goto out;
1113
1114 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1115 ctrl_ext &= ~(E1000_CTRL_EXT_LINK_MODE_MASK);
1116 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1117
1113 if (ret_val)
1114 goto out;
1115
1116 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1117 ctrl_ext &= ~(E1000_CTRL_EXT_LINK_MODE_MASK);
1118 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1119
1118 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
1120 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
1119 if (ret_val)
1120 goto out;
1121
1122 /*
1123 * Do not init these registers when the HW is in IAMT mode, since the
1124 * firmware will have already initialized them. We only initialize
1125 * them if the HW is not in IAMT mode.
1126 */
1121 if (ret_val)
1122 goto out;
1123
1124 /*
1125 * Do not init these registers when the HW is in IAMT mode, since the
1126 * firmware will have already initialized them. We only initialize
1127 * them if the HW is not in IAMT mode.
1128 */
1127 if (!(e1000_check_mng_mode(hw))) {
1129 if (!(hw->mac.ops.check_mng_mode(hw))) {
1128 /* Enable Electrical Idle on the PHY */
1129 data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;
1130 /* Enable Electrical Idle on the PHY */
1131 data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;
1130 ret_val = e1000_write_phy_reg(hw,
1132 ret_val = hw->phy.ops.write_reg(hw,
1131 GG82563_PHY_PWR_MGMT_CTRL,
1132 data);
1133 if (ret_val)
1134 goto out;
1135
1136 do {
1133 GG82563_PHY_PWR_MGMT_CTRL,
1134 data);
1135 if (ret_val)
1136 goto out;
1137
1138 do {
1137 ret_val = e1000_read_phy_reg(hw,
1139 ret_val = hw->phy.ops.read_reg(hw,
1138 GG82563_PHY_KMRN_MODE_CTRL,
1139 &data);
1140 if (ret_val)
1141 goto out;
1142
1140 GG82563_PHY_KMRN_MODE_CTRL,
1141 &data);
1142 if (ret_val)
1143 goto out;
1144
1143 ret_val = e1000_read_phy_reg(hw,
1145 ret_val = hw->phy.ops.read_reg(hw,
1144 GG82563_PHY_KMRN_MODE_CTRL,
1145 &data2);
1146 if (ret_val)
1147 goto out;
1148 i++;
1149 } while ((data != data2) && (i < GG82563_MAX_KMRN_RETRY));
1150
1151 data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1146 GG82563_PHY_KMRN_MODE_CTRL,
1147 &data2);
1148 if (ret_val)
1149 goto out;
1150 i++;
1151 } while ((data != data2) && (i < GG82563_MAX_KMRN_RETRY));
1152
1153 data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1152 ret_val = e1000_write_phy_reg(hw,
1154 ret_val = hw->phy.ops.write_reg(hw,
1153 GG82563_PHY_KMRN_MODE_CTRL,
1154 data);
1155
1156 if (ret_val)
1157 goto out;
1158 }
1159
1160 /*
1161 * Workaround: Disable padding in Kumeran interface in the MAC
1162 * and in the PHY to avoid CRC errors.
1163 */
1155 GG82563_PHY_KMRN_MODE_CTRL,
1156 data);
1157
1158 if (ret_val)
1159 goto out;
1160 }
1161
1162 /*
1163 * Workaround: Disable padding in Kumeran interface in the MAC
1164 * and in the PHY to avoid CRC errors.
1165 */
1164 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_INBAND_CTRL, &data);
1166 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_INBAND_CTRL, &data);
1165 if (ret_val)
1166 goto out;
1167
1168 data |= GG82563_ICR_DIS_PADDING;
1167 if (ret_val)
1168 goto out;
1169
1170 data |= GG82563_ICR_DIS_PADDING;
1169 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_INBAND_CTRL, data);
1171 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_INBAND_CTRL, data);
1170 if (ret_val)
1171 goto out;
1172
1173out:
1174 return ret_val;
1175}
1176
1177/**
1178 * e1000_setup_copper_link_80003es2lan - Setup Copper Link for ESB2
1179 * @hw: pointer to the HW structure
1180 *
1181 * Essentially a wrapper for setting up all things "copper" related.
1182 * This is a function pointer entry point called by the mac module.
1183 **/
1172 if (ret_val)
1173 goto out;
1174
1175out:
1176 return ret_val;
1177}
1178
1179/**
1180 * e1000_setup_copper_link_80003es2lan - Setup Copper Link for ESB2
1181 * @hw: pointer to the HW structure
1182 *
1183 * Essentially a wrapper for setting up all things "copper" related.
1184 * This is a function pointer entry point called by the mac module.
1185 **/
1184STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
1186static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
1185{
1186 u32 ctrl;
1187 s32 ret_val;
1188 u16 reg_data;
1189
1190 DEBUGFUNC("e1000_setup_copper_link_80003es2lan");
1191
1192 ctrl = E1000_READ_REG(hw, E1000_CTRL);

--- 65 unchanged lines hidden (view full) ---

1258 /* Configure Transmit Inter-Packet Gap */
1259 tipg = E1000_READ_REG(hw, E1000_TIPG);
1260 tipg &= ~E1000_TIPG_IPGT_MASK;
1261 tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN;
1262 E1000_WRITE_REG(hw, E1000_TIPG, tipg);
1263
1264
1265 do {
1187{
1188 u32 ctrl;
1189 s32 ret_val;
1190 u16 reg_data;
1191
1192 DEBUGFUNC("e1000_setup_copper_link_80003es2lan");
1193
1194 ctrl = E1000_READ_REG(hw, E1000_CTRL);

--- 65 unchanged lines hidden (view full) ---

1260 /* Configure Transmit Inter-Packet Gap */
1261 tipg = E1000_READ_REG(hw, E1000_TIPG);
1262 tipg &= ~E1000_TIPG_IPGT_MASK;
1263 tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN;
1264 E1000_WRITE_REG(hw, E1000_TIPG, tipg);
1265
1266
1267 do {
1266 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1268 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1267 &reg_data);
1268 if (ret_val)
1269 goto out;
1270
1269 &reg_data);
1270 if (ret_val)
1271 goto out;
1272
1271 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1273 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1272 &reg_data2);
1273 if (ret_val)
1274 goto out;
1275 i++;
1276 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1277
1278 if (duplex == HALF_DUPLEX)
1279 reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
1280 else
1281 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1282
1274 &reg_data2);
1275 if (ret_val)
1276 goto out;
1277 i++;
1278 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1279
1280 if (duplex == HALF_DUPLEX)
1281 reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
1282 else
1283 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1284
1283 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1285 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1284
1285out:
1286 return ret_val;
1287}
1288
1289/**
1290 * e1000_cfg_kmrn_1000_80003es2lan - Apply "quirks" for gigabit operation
1291 * @hw: pointer to the HW structure

--- 20 unchanged lines hidden (view full) ---

1312 /* Configure Transmit Inter-Packet Gap */
1313 tipg = E1000_READ_REG(hw, E1000_TIPG);
1314 tipg &= ~E1000_TIPG_IPGT_MASK;
1315 tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
1316 E1000_WRITE_REG(hw, E1000_TIPG, tipg);
1317
1318
1319 do {
1286
1287out:
1288 return ret_val;
1289}
1290
1291/**
1292 * e1000_cfg_kmrn_1000_80003es2lan - Apply "quirks" for gigabit operation
1293 * @hw: pointer to the HW structure

--- 20 unchanged lines hidden (view full) ---

1314 /* Configure Transmit Inter-Packet Gap */
1315 tipg = E1000_READ_REG(hw, E1000_TIPG);
1316 tipg &= ~E1000_TIPG_IPGT_MASK;
1317 tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
1318 E1000_WRITE_REG(hw, E1000_TIPG, tipg);
1319
1320
1321 do {
1320 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1322 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1321 &reg_data);
1322 if (ret_val)
1323 goto out;
1324
1323 &reg_data);
1324 if (ret_val)
1325 goto out;
1326
1325 ret_val = e1000_read_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1327 ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1326 &reg_data2);
1327 if (ret_val)
1328 goto out;
1329 i++;
1330 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1331
1332 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1328 &reg_data2);
1329 if (ret_val)
1330 goto out;
1331 i++;
1332 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1333
1334 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1333 ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1335 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1334
1335out:
1336 return ret_val;
1337}
1338
1339/**
1340 * e1000_read_mac_addr_80003es2lan - Read device MAC address
1341 * @hw: pointer to the HW structure
1342 **/
1336
1337out:
1338 return ret_val;
1339}
1340
1341/**
1342 * e1000_read_mac_addr_80003es2lan - Read device MAC address
1343 * @hw: pointer to the HW structure
1344 **/
1343STATIC s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)
1345static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)
1344{
1345 s32 ret_val = E1000_SUCCESS;
1346
1347 DEBUGFUNC("e1000_read_mac_addr_80003es2lan");
1348 if (e1000_check_alt_mac_addr_generic(hw))
1349 ret_val = e1000_read_mac_addr_generic(hw);
1350
1351 return ret_val;
1352}
1353
1354/**
1355 * e1000_power_down_phy_copper_80003es2lan - Remove link during PHY power down
1356 * @hw: pointer to the HW structure
1357 *
1358 * In the case of a PHY power down to save power, or to turn off link during a
1359 * driver unload, or wake on lan is not enabled, remove the link.
1360 **/
1346{
1347 s32 ret_val = E1000_SUCCESS;
1348
1349 DEBUGFUNC("e1000_read_mac_addr_80003es2lan");
1350 if (e1000_check_alt_mac_addr_generic(hw))
1351 ret_val = e1000_read_mac_addr_generic(hw);
1352
1353 return ret_val;
1354}
1355
1356/**
1357 * e1000_power_down_phy_copper_80003es2lan - Remove link during PHY power down
1358 * @hw: pointer to the HW structure
1359 *
1360 * In the case of a PHY power down to save power, or to turn off link during a
1361 * driver unload, or wake on lan is not enabled, remove the link.
1362 **/
1361STATIC void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)
1363static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)
1362{
1363 /* If the management interface is not enabled, then power down */
1364{
1365 /* If the management interface is not enabled, then power down */
1364 if (!(e1000_check_mng_mode(hw) || e1000_check_reset_block(hw)))
1366 if (!(hw->mac.ops.check_mng_mode(hw) ||
1367 hw->phy.ops.check_reset_block(hw)))
1365 e1000_power_down_phy_copper(hw);
1366
1367 return;
1368}
1369
1370/**
1371 * e1000_clear_hw_cntrs_80003es2lan - Clear device specific hardware counters
1372 * @hw: pointer to the HW structure
1373 *
1374 * Clears the hardware counters by reading the counter registers.
1375 **/
1368 e1000_power_down_phy_copper(hw);
1369
1370 return;
1371}
1372
1373/**
1374 * e1000_clear_hw_cntrs_80003es2lan - Clear device specific hardware counters
1375 * @hw: pointer to the HW structure
1376 *
1377 * Clears the hardware counters by reading the counter registers.
1378 **/
1376STATIC void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1379static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1377{
1378 volatile u32 temp;
1379
1380 DEBUGFUNC("e1000_clear_hw_cntrs_80003es2lan");
1381
1382 e1000_clear_hw_cntrs_base_generic(hw);
1383
1384 temp = E1000_READ_REG(hw, E1000_PRC64);

--- 34 unchanged lines hidden --- 		1380{
1381 volatile u32 temp;
1382
1383 DEBUGFUNC("e1000_clear_hw_cntrs_80003es2lan");
1384
1385 e1000_clear_hw_cntrs_base_generic(hw);
1386
1387 temp = E1000_READ_REG(hw, E1000_PRC64);

--- 34 unchanged lines hidden ---