1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/am33xx.h>
13
14#include "skeleton.dtsi"
15
16/ {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
65 clock-latency = <300000>; /* From omap-cpufreq driver */
66 };
67 };
68
69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
74 /*
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
| 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/am33xx.h>
13
14#include "skeleton.dtsi"
15
16/ {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
65 clock-latency = <300000>; /* From omap-cpufreq driver */
66 };
67 };
68
69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
74 /*
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
|
86 am33xx_control_module: control_module@4a002000 {
87 compatible = "syscon";
88 reg = <0x44e10000 0x7fc>;
89 };
90
91 am33xx_pinmux: pinmux@44e10800 {
92 compatible = "pinctrl-single";
93 reg = <0x44e10800 0x0238>;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 pinctrl-single,register-width = <32>;
97 pinctrl-single,function-mask = <0x7f>;
98 };
99
| |
100 /*
101 * XXX: Use a flat representation of the AM33XX interconnect.
102 * The real AM33XX interconnect network is quite complex. Since
103 * it will not bring real advantage to represent that in DT
104 * for the moment, just use a fake OCP bus entry to represent
105 * the whole bus hierarchy.
106 */
107 ocp {
108 compatible = "simple-bus";
109 #address-cells = <1>;
110 #size-cells = <1>;
111 ranges;
112 ti,hwmods = "l3_main";
113
| 86 /*
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
92 */
93 ocp {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 ti,hwmods = "l3_main";
99
|
114 prcm: prcm@44e00000 {
115 compatible = "ti,am3-prcm";
116 reg = <0x44e00000 0x4000>;
| 100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
|
117
| 105
|
118 prcm_clocks: clocks {
119 #address-cells = <1>;
120 #size-cells = <0>;
| 106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
109 <0x180000 0x2000>;
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
|
121 };
122
| 113 };
114
|
123 prcm_clockdomains: clockdomains {
124 };
125 };
| 115 prcm: prcm@200000 {
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
|
126
| 118
|
127 scrm: scrm@44e10000 {
128 compatible = "ti,am3-scrm";
129 reg = <0x44e10000 0x2000>;
| 119 prcm_clocks: clocks {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 };
|
130
| 123
|
131 scrm_clocks: clocks {
132 #address-cells = <1>;
133 #size-cells = <0>;
| 124 prcm_clockdomains: clockdomains {
125 };
|
134 };
135
| 126 };
127
|
136 scrm_clockdomains: clockdomains {
| 128 scm: scm@210000 {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
134
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
137 reg = <0x800 0x238>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
142 };
143
144 scm_conf: scm_conf@0 {
145 compatible = "syscon";
146 reg = <0x0 0x800>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149
150 scm_clocks: clocks {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 };
154 };
155
156 wkup_m3_ipc: wkup_m3_ipc@1324 {
157 compatible = "ti,am3352-wkup-m3-ipc";
158 reg = <0x1324 0x24>;
159 interrupts = <78>;
160 ti,rproc = <&wkup_m3>;
161 mboxes = <&mailbox &mbox_wkupm3>;
162 };
163
164 edma_xbar: dma-router@f90 {
165 compatible = "ti,am335x-edma-crossbar";
166 reg = <0xf90 0x40>;
167 #dma-cells = <3>;
168 dma-requests = <32>;
169 dma-masters = <&edma>;
170 };
171
172 scm_clockdomains: clockdomains {
173 };
|
137 };
138 };
139
| 174 };
175 };
176
|
140 cm: syscon@44e10000 {
141 compatible = "ti,am33xx-controlmodule", "syscon";
142 reg = <0x44e10000 0x800>;
143 };
144
| |
145 intc: interrupt-controller@48200000 {
146 compatible = "ti,am33xx-intc";
147 interrupt-controller;
148 #interrupt-cells = <1>;
149 reg = <0x48200000 0x1000>;
150 };
151
152 edma: edma@49000000 {
| 177 intc: interrupt-controller@48200000 {
178 compatible = "ti,am33xx-intc";
179 interrupt-controller;
180 #interrupt-cells = <1>;
181 reg = <0x48200000 0x1000>;
182 };
183
184 edma: edma@49000000 {
|
153 compatible = "ti,edma3";
154 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
155 reg = <0x49000000 0x10000>,
156 <0x44e10f90 0x40>;
| 185 compatible = "ti,edma3-tpcc";
186 ti,hwmods = "tpcc";
187 reg = <0x49000000 0x10000>;
188 reg-names = "edma3_cc";
|
157 interrupts = <12 13 14>;
| 189 interrupts = <12 13 14>;
|
158 #dma-cells = <1>;
| 190 interrupt-names = "edma3_ccint", "emda3_mperr",
191 "edma3_ccerrint";
192 dma-requests = <64>;
193 #dma-cells = <2>;
194
195 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
196 <&edma_tptc2 0>;
197
198 ti,edma-memcpy-channels = <20 21>;
|
159 };
160
| 199 };
200
|
| 201 edma_tptc0: tptc@49800000 {
202 compatible = "ti,edma3-tptc";
203 ti,hwmods = "tptc0";
204 reg = <0x49800000 0x100000>;
205 interrupts = <112>;
206 interrupt-names = "edma3_tcerrint";
207 };
208
209 edma_tptc1: tptc@49900000 {
210 compatible = "ti,edma3-tptc";
211 ti,hwmods = "tptc1";
212 reg = <0x49900000 0x100000>;
213 interrupts = <113>;
214 interrupt-names = "edma3_tcerrint";
215 };
216
217 edma_tptc2: tptc@49a00000 {
218 compatible = "ti,edma3-tptc";
219 ti,hwmods = "tptc2";
220 reg = <0x49a00000 0x100000>;
221 interrupts = <114>;
222 interrupt-names = "edma3_tcerrint";
223 };
224
|
161 gpio0: gpio@44e07000 {
162 compatible = "ti,omap4-gpio";
163 ti,hwmods = "gpio1";
164 gpio-controller;
165 #gpio-cells = <2>;
166 interrupt-controller;
167 #interrupt-cells = <2>;
168 reg = <0x44e07000 0x1000>;
169 interrupts = <96>;
170 };
171
172 gpio1: gpio@4804c000 {
173 compatible = "ti,omap4-gpio";
174 ti,hwmods = "gpio2";
175 gpio-controller;
176 #gpio-cells = <2>;
177 interrupt-controller;
178 #interrupt-cells = <2>;
179 reg = <0x4804c000 0x1000>;
180 interrupts = <98>;
181 };
182
183 gpio2: gpio@481ac000 {
184 compatible = "ti,omap4-gpio";
185 ti,hwmods = "gpio3";
186 gpio-controller;
187 #gpio-cells = <2>;
188 interrupt-controller;
189 #interrupt-cells = <2>;
190 reg = <0x481ac000 0x1000>;
191 interrupts = <32>;
192 };
193
194 gpio3: gpio@481ae000 {
195 compatible = "ti,omap4-gpio";
196 ti,hwmods = "gpio4";
197 gpio-controller;
198 #gpio-cells = <2>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
201 reg = <0x481ae000 0x1000>;
202 interrupts = <62>;
203 };
204
205 uart0: serial@44e09000 {
| 225 gpio0: gpio@44e07000 {
226 compatible = "ti,omap4-gpio";
227 ti,hwmods = "gpio1";
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 reg = <0x44e07000 0x1000>;
233 interrupts = <96>;
234 };
235
236 gpio1: gpio@4804c000 {
237 compatible = "ti,omap4-gpio";
238 ti,hwmods = "gpio2";
239 gpio-controller;
240 #gpio-cells = <2>;
241 interrupt-controller;
242 #interrupt-cells = <2>;
243 reg = <0x4804c000 0x1000>;
244 interrupts = <98>;
245 };
246
247 gpio2: gpio@481ac000 {
248 compatible = "ti,omap4-gpio";
249 ti,hwmods = "gpio3";
250 gpio-controller;
251 #gpio-cells = <2>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
254 reg = <0x481ac000 0x1000>;
255 interrupts = <32>;
256 };
257
258 gpio3: gpio@481ae000 {
259 compatible = "ti,omap4-gpio";
260 ti,hwmods = "gpio4";
261 gpio-controller;
262 #gpio-cells = <2>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 reg = <0x481ae000 0x1000>;
266 interrupts = <62>;
267 };
268
269 uart0: serial@44e09000 {
|
206 compatible = "ti,omap3-uart";
| 270 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
207 ti,hwmods = "uart1";
208 clock-frequency = <48000000>;
209 reg = <0x44e09000 0x2000>;
210 interrupts = <72>;
211 status = "disabled";
| 271 ti,hwmods = "uart1";
272 clock-frequency = <48000000>;
273 reg = <0x44e09000 0x2000>;
274 interrupts = <72>;
275 status = "disabled";
|
212 dmas = <&edma 26>, <&edma 27>;
| 276 dmas = <&edma 26 0>, <&edma 27 0>;
|
213 dma-names = "tx", "rx";
214 };
215
216 uart1: serial@48022000 {
| 277 dma-names = "tx", "rx";
278 };
279
280 uart1: serial@48022000 {
|
217 compatible = "ti,omap3-uart";
| 281 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
218 ti,hwmods = "uart2";
219 clock-frequency = <48000000>;
220 reg = <0x48022000 0x2000>;
221 interrupts = <73>;
222 status = "disabled";
| 282 ti,hwmods = "uart2";
283 clock-frequency = <48000000>;
284 reg = <0x48022000 0x2000>;
285 interrupts = <73>;
286 status = "disabled";
|
223 dmas = <&edma 28>, <&edma 29>;
| 287 dmas = <&edma 28 0>, <&edma 29 0>;
|
224 dma-names = "tx", "rx";
225 };
226
227 uart2: serial@48024000 {
| 288 dma-names = "tx", "rx";
289 };
290
291 uart2: serial@48024000 {
|
228 compatible = "ti,omap3-uart";
| 292 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
229 ti,hwmods = "uart3";
230 clock-frequency = <48000000>;
231 reg = <0x48024000 0x2000>;
232 interrupts = <74>;
233 status = "disabled";
| 293 ti,hwmods = "uart3";
294 clock-frequency = <48000000>;
295 reg = <0x48024000 0x2000>;
296 interrupts = <74>;
297 status = "disabled";
|
234 dmas = <&edma 30>, <&edma 31>;
| 298 dmas = <&edma 30 0>, <&edma 31 0>;
|
235 dma-names = "tx", "rx";
236 };
237
238 uart3: serial@481a6000 {
| 299 dma-names = "tx", "rx";
300 };
301
302 uart3: serial@481a6000 {
|
239 compatible = "ti,omap3-uart";
| 303 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
240 ti,hwmods = "uart4";
241 clock-frequency = <48000000>;
242 reg = <0x481a6000 0x2000>;
243 interrupts = <44>;
244 status = "disabled";
245 };
246
247 uart4: serial@481a8000 {
| 304 ti,hwmods = "uart4";
305 clock-frequency = <48000000>;
306 reg = <0x481a6000 0x2000>;
307 interrupts = <44>;
308 status = "disabled";
309 };
310
311 uart4: serial@481a8000 {
|
248 compatible = "ti,omap3-uart";
| 312 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
249 ti,hwmods = "uart5";
250 clock-frequency = <48000000>;
251 reg = <0x481a8000 0x2000>;
252 interrupts = <45>;
253 status = "disabled";
254 };
255
256 uart5: serial@481aa000 {
| 313 ti,hwmods = "uart5";
314 clock-frequency = <48000000>;
315 reg = <0x481a8000 0x2000>;
316 interrupts = <45>;
317 status = "disabled";
318 };
319
320 uart5: serial@481aa000 {
|
257 compatible = "ti,omap3-uart";
| 321 compatible = "ti,am3352-uart", "ti,omap3-uart";
|
258 ti,hwmods = "uart6";
259 clock-frequency = <48000000>;
260 reg = <0x481aa000 0x2000>;
261 interrupts = <46>;
262 status = "disabled";
263 };
264
265 i2c0: i2c@44e0b000 {
266 compatible = "ti,omap4-i2c";
267 #address-cells = <1>;
268 #size-cells = <0>;
269 ti,hwmods = "i2c1";
270 reg = <0x44e0b000 0x1000>;
271 interrupts = <70>;
272 status = "disabled";
273 };
274
275 i2c1: i2c@4802a000 {
276 compatible = "ti,omap4-i2c";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 ti,hwmods = "i2c2";
280 reg = <0x4802a000 0x1000>;
281 interrupts = <71>;
282 status = "disabled";
283 };
284
285 i2c2: i2c@4819c000 {
286 compatible = "ti,omap4-i2c";
287 #address-cells = <1>;
288 #size-cells = <0>;
289 ti,hwmods = "i2c3";
290 reg = <0x4819c000 0x1000>;
291 interrupts = <30>;
292 status = "disabled";
293 };
294
295 mmc1: mmc@48060000 {
296 compatible = "ti,omap4-hsmmc";
297 ti,hwmods = "mmc1";
298 ti,dual-volt;
299 ti,needs-special-reset;
300 ti,needs-special-hs-handling;
| 322 ti,hwmods = "uart6";
323 clock-frequency = <48000000>;
324 reg = <0x481aa000 0x2000>;
325 interrupts = <46>;
326 status = "disabled";
327 };
328
329 i2c0: i2c@44e0b000 {
330 compatible = "ti,omap4-i2c";
331 #address-cells = <1>;
332 #size-cells = <0>;
333 ti,hwmods = "i2c1";
334 reg = <0x44e0b000 0x1000>;
335 interrupts = <70>;
336 status = "disabled";
337 };
338
339 i2c1: i2c@4802a000 {
340 compatible = "ti,omap4-i2c";
341 #address-cells = <1>;
342 #size-cells = <0>;
343 ti,hwmods = "i2c2";
344 reg = <0x4802a000 0x1000>;
345 interrupts = <71>;
346 status = "disabled";
347 };
348
349 i2c2: i2c@4819c000 {
350 compatible = "ti,omap4-i2c";
351 #address-cells = <1>;
352 #size-cells = <0>;
353 ti,hwmods = "i2c3";
354 reg = <0x4819c000 0x1000>;
355 interrupts = <30>;
356 status = "disabled";
357 };
358
359 mmc1: mmc@48060000 {
360 compatible = "ti,omap4-hsmmc";
361 ti,hwmods = "mmc1";
362 ti,dual-volt;
363 ti,needs-special-reset;
364 ti,needs-special-hs-handling;
|
301 dmas = <&edma 24
302 &edma 25>;
| 365 dmas = <&edma_xbar 24 0 0
366 &edma_xbar 25 0 0>;
|
303 dma-names = "tx", "rx";
304 interrupts = <64>;
305 interrupt-parent = <&intc>;
306 reg = <0x48060000 0x1000>;
307 status = "disabled";
308 };
309
310 mmc2: mmc@481d8000 {
311 compatible = "ti,omap4-hsmmc";
312 ti,hwmods = "mmc2";
313 ti,needs-special-reset;
| 367 dma-names = "tx", "rx";
368 interrupts = <64>;
369 interrupt-parent = <&intc>;
370 reg = <0x48060000 0x1000>;
371 status = "disabled";
372 };
373
374 mmc2: mmc@481d8000 {
375 compatible = "ti,omap4-hsmmc";
376 ti,hwmods = "mmc2";
377 ti,needs-special-reset;
|
314 dmas = <&edma 2
315 &edma 3>;
| 378 dmas = <&edma 2 0
379 &edma 3 0>;
|
316 dma-names = "tx", "rx";
317 interrupts = <28>;
318 interrupt-parent = <&intc>;
319 reg = <0x481d8000 0x1000>;
320 status = "disabled";
321 };
322
323 mmc3: mmc@47810000 {
324 compatible = "ti,omap4-hsmmc";
325 ti,hwmods = "mmc3";
326 ti,needs-special-reset;
327 interrupts = <29>;
328 interrupt-parent = <&intc>;
329 reg = <0x47810000 0x1000>;
330 status = "disabled";
331 };
332
333 hwspinlock: spinlock@480ca000 {
334 compatible = "ti,omap4-hwspinlock";
335 reg = <0x480ca000 0x1000>;
336 ti,hwmods = "spinlock";
337 #hwlock-cells = <1>;
338 };
339
340 wdt2: wdt@44e35000 {
341 compatible = "ti,omap3-wdt";
342 ti,hwmods = "wd_timer2";
343 reg = <0x44e35000 0x1000>;
344 interrupts = <91>;
345 };
346
347 dcan0: can@481cc000 {
348 compatible = "ti,am3352-d_can";
349 ti,hwmods = "d_can0";
350 reg = <0x481cc000 0x2000>;
351 clocks = <&dcan0_fck>;
352 clock-names = "fck";
| 380 dma-names = "tx", "rx";
381 interrupts = <28>;
382 interrupt-parent = <&intc>;
383 reg = <0x481d8000 0x1000>;
384 status = "disabled";
385 };
386
387 mmc3: mmc@47810000 {
388 compatible = "ti,omap4-hsmmc";
389 ti,hwmods = "mmc3";
390 ti,needs-special-reset;
391 interrupts = <29>;
392 interrupt-parent = <&intc>;
393 reg = <0x47810000 0x1000>;
394 status = "disabled";
395 };
396
397 hwspinlock: spinlock@480ca000 {
398 compatible = "ti,omap4-hwspinlock";
399 reg = <0x480ca000 0x1000>;
400 ti,hwmods = "spinlock";
401 #hwlock-cells = <1>;
402 };
403
404 wdt2: wdt@44e35000 {
405 compatible = "ti,omap3-wdt";
406 ti,hwmods = "wd_timer2";
407 reg = <0x44e35000 0x1000>;
408 interrupts = <91>;
409 };
410
411 dcan0: can@481cc000 {
412 compatible = "ti,am3352-d_can";
413 ti,hwmods = "d_can0";
414 reg = <0x481cc000 0x2000>;
415 clocks = <&dcan0_fck>;
416 clock-names = "fck";
|
353 syscon-raminit = <&am33xx_control_module 0x644 0>;
| 417 syscon-raminit = <&scm_conf 0x644 0>;
|
354 interrupts = <52>;
355 status = "disabled";
356 };
357
358 dcan1: can@481d0000 {
359 compatible = "ti,am3352-d_can";
360 ti,hwmods = "d_can1";
361 reg = <0x481d0000 0x2000>;
362 clocks = <&dcan1_fck>;
363 clock-names = "fck";
| 418 interrupts = <52>;
419 status = "disabled";
420 };
421
422 dcan1: can@481d0000 {
423 compatible = "ti,am3352-d_can";
424 ti,hwmods = "d_can1";
425 reg = <0x481d0000 0x2000>;
426 clocks = <&dcan1_fck>;
427 clock-names = "fck";
|
364 syscon-raminit = <&am33xx_control_module 0x644 1>;
| 428 syscon-raminit = <&scm_conf 0x644 1>;
|
365 interrupts = <55>;
366 status = "disabled";
367 };
368
369 mailbox: mailbox@480C8000 {
370 compatible = "ti,omap4-mailbox";
371 reg = <0x480C8000 0x200>;
372 interrupts = <77>;
373 ti,hwmods = "mailbox";
374 #mbox-cells = <1>;
375 ti,mbox-num-users = <4>;
376 ti,mbox-num-fifos = <8>;
377 mbox_wkupm3: wkup_m3 {
378 ti,mbox-tx = <0 0 0>;
379 ti,mbox-rx = <0 0 3>;
380 };
381 };
382
383 timer1: timer@44e31000 {
384 compatible = "ti,am335x-timer-1ms";
385 reg = <0x44e31000 0x400>;
386 interrupts = <67>;
387 ti,hwmods = "timer1";
388 ti,timer-alwon;
389 };
390
391 timer2: timer@48040000 {
392 compatible = "ti,am335x-timer";
393 reg = <0x48040000 0x400>;
394 interrupts = <68>;
395 ti,hwmods = "timer2";
396 };
397
398 timer3: timer@48042000 {
399 compatible = "ti,am335x-timer";
400 reg = <0x48042000 0x400>;
401 interrupts = <69>;
402 ti,hwmods = "timer3";
403 };
404
405 timer4: timer@48044000 {
406 compatible = "ti,am335x-timer";
407 reg = <0x48044000 0x400>;
408 interrupts = <92>;
409 ti,hwmods = "timer4";
410 ti,timer-pwm;
411 };
412
413 timer5: timer@48046000 {
414 compatible = "ti,am335x-timer";
415 reg = <0x48046000 0x400>;
416 interrupts = <93>;
417 ti,hwmods = "timer5";
418 ti,timer-pwm;
419 };
420
421 timer6: timer@48048000 {
422 compatible = "ti,am335x-timer";
423 reg = <0x48048000 0x400>;
424 interrupts = <94>;
425 ti,hwmods = "timer6";
426 ti,timer-pwm;
427 };
428
429 timer7: timer@4804a000 {
430 compatible = "ti,am335x-timer";
431 reg = <0x4804a000 0x400>;
432 interrupts = <95>;
433 ti,hwmods = "timer7";
434 ti,timer-pwm;
435 };
436
437 rtc: rtc@44e3e000 {
438 compatible = "ti,am3352-rtc", "ti,da830-rtc";
439 reg = <0x44e3e000 0x1000>;
440 interrupts = <75
441 76>;
442 ti,hwmods = "rtc";
443 };
444
445 spi0: spi@48030000 {
446 compatible = "ti,omap4-mcspi";
447 #address-cells = <1>;
448 #size-cells = <0>;
449 reg = <0x48030000 0x400>;
450 interrupts = <65>;
451 ti,spi-num-cs = <2>;
452 ti,hwmods = "spi0";
| 429 interrupts = <55>;
430 status = "disabled";
431 };
432
433 mailbox: mailbox@480C8000 {
434 compatible = "ti,omap4-mailbox";
435 reg = <0x480C8000 0x200>;
436 interrupts = <77>;
437 ti,hwmods = "mailbox";
438 #mbox-cells = <1>;
439 ti,mbox-num-users = <4>;
440 ti,mbox-num-fifos = <8>;
441 mbox_wkupm3: wkup_m3 {
442 ti,mbox-tx = <0 0 0>;
443 ti,mbox-rx = <0 0 3>;
444 };
445 };
446
447 timer1: timer@44e31000 {
448 compatible = "ti,am335x-timer-1ms";
449 reg = <0x44e31000 0x400>;
450 interrupts = <67>;
451 ti,hwmods = "timer1";
452 ti,timer-alwon;
453 };
454
455 timer2: timer@48040000 {
456 compatible = "ti,am335x-timer";
457 reg = <0x48040000 0x400>;
458 interrupts = <68>;
459 ti,hwmods = "timer2";
460 };
461
462 timer3: timer@48042000 {
463 compatible = "ti,am335x-timer";
464 reg = <0x48042000 0x400>;
465 interrupts = <69>;
466 ti,hwmods = "timer3";
467 };
468
469 timer4: timer@48044000 {
470 compatible = "ti,am335x-timer";
471 reg = <0x48044000 0x400>;
472 interrupts = <92>;
473 ti,hwmods = "timer4";
474 ti,timer-pwm;
475 };
476
477 timer5: timer@48046000 {
478 compatible = "ti,am335x-timer";
479 reg = <0x48046000 0x400>;
480 interrupts = <93>;
481 ti,hwmods = "timer5";
482 ti,timer-pwm;
483 };
484
485 timer6: timer@48048000 {
486 compatible = "ti,am335x-timer";
487 reg = <0x48048000 0x400>;
488 interrupts = <94>;
489 ti,hwmods = "timer6";
490 ti,timer-pwm;
491 };
492
493 timer7: timer@4804a000 {
494 compatible = "ti,am335x-timer";
495 reg = <0x4804a000 0x400>;
496 interrupts = <95>;
497 ti,hwmods = "timer7";
498 ti,timer-pwm;
499 };
500
501 rtc: rtc@44e3e000 {
502 compatible = "ti,am3352-rtc", "ti,da830-rtc";
503 reg = <0x44e3e000 0x1000>;
504 interrupts = <75
505 76>;
506 ti,hwmods = "rtc";
507 };
508
509 spi0: spi@48030000 {
510 compatible = "ti,omap4-mcspi";
511 #address-cells = <1>;
512 #size-cells = <0>;
513 reg = <0x48030000 0x400>;
514 interrupts = <65>;
515 ti,spi-num-cs = <2>;
516 ti,hwmods = "spi0";
|
453 dmas = <&edma 16
454 &edma 17
455 &edma 18
456 &edma 19>;
| 517 dmas = <&edma 16 0
518 &edma 17 0
519 &edma 18 0
520 &edma 19 0>;
|
457 dma-names = "tx0", "rx0", "tx1", "rx1";
458 status = "disabled";
459 };
460
461 spi1: spi@481a0000 {
462 compatible = "ti,omap4-mcspi";
463 #address-cells = <1>;
464 #size-cells = <0>;
465 reg = <0x481a0000 0x400>;
466 interrupts = <125>;
467 ti,spi-num-cs = <2>;
468 ti,hwmods = "spi1";
| 521 dma-names = "tx0", "rx0", "tx1", "rx1";
522 status = "disabled";
523 };
524
525 spi1: spi@481a0000 {
526 compatible = "ti,omap4-mcspi";
527 #address-cells = <1>;
528 #size-cells = <0>;
529 reg = <0x481a0000 0x400>;
530 interrupts = <125>;
531 ti,spi-num-cs = <2>;
532 ti,hwmods = "spi1";
|
469 dmas = <&edma 42
470 &edma 43
471 &edma 44
472 &edma 45>;
| 533 dmas = <&edma 42 0
534 &edma 43 0
535 &edma 44 0
536 &edma 45 0>;
|
473 dma-names = "tx0", "rx0", "tx1", "rx1";
474 status = "disabled";
475 };
476
477 usb: usb@47400000 {
478 compatible = "ti,am33xx-usb";
479 reg = <0x47400000 0x1000>;
480 ranges;
481 #address-cells = <1>;
482 #size-cells = <1>;
483 ti,hwmods = "usb_otg_hs";
484 status = "disabled";
485
486 usb_ctrl_mod: control@44e10620 {
487 compatible = "ti,am335x-usb-ctrl-module";
488 reg = <0x44e10620 0x10
489 0x44e10648 0x4>;
490 reg-names = "phy_ctrl", "wakeup";
491 status = "disabled";
492 };
493
494 usb0_phy: usb-phy@47401300 {
495 compatible = "ti,am335x-usb-phy";
496 reg = <0x47401300 0x100>;
497 reg-names = "phy";
498 status = "disabled";
499 ti,ctrl_mod = <&usb_ctrl_mod>;
500 };
501
502 usb0: usb@47401000 {
503 compatible = "ti,musb-am33xx";
504 status = "disabled";
505 reg = <0x47401400 0x400
506 0x47401000 0x200>;
507 reg-names = "mc", "control";
508
509 interrupts = <18>;
510 interrupt-names = "mc";
511 dr_mode = "otg";
512 mentor,multipoint = <1>;
513 mentor,num-eps = <16>;
514 mentor,ram-bits = <12>;
515 mentor,power = <500>;
516 phys = <&usb0_phy>;
517
518 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
519 &cppi41dma 2 0 &cppi41dma 3 0
520 &cppi41dma 4 0 &cppi41dma 5 0
521 &cppi41dma 6 0 &cppi41dma 7 0
522 &cppi41dma 8 0 &cppi41dma 9 0
523 &cppi41dma 10 0 &cppi41dma 11 0
524 &cppi41dma 12 0 &cppi41dma 13 0
525 &cppi41dma 14 0 &cppi41dma 0 1
526 &cppi41dma 1 1 &cppi41dma 2 1
527 &cppi41dma 3 1 &cppi41dma 4 1
528 &cppi41dma 5 1 &cppi41dma 6 1
529 &cppi41dma 7 1 &cppi41dma 8 1
530 &cppi41dma 9 1 &cppi41dma 10 1
531 &cppi41dma 11 1 &cppi41dma 12 1
532 &cppi41dma 13 1 &cppi41dma 14 1>;
533 dma-names =
534 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
535 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
536 "rx14", "rx15",
537 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
538 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
539 "tx14", "tx15";
540 };
541
542 usb1_phy: usb-phy@47401b00 {
543 compatible = "ti,am335x-usb-phy";
544 reg = <0x47401b00 0x100>;
545 reg-names = "phy";
546 status = "disabled";
547 ti,ctrl_mod = <&usb_ctrl_mod>;
548 };
549
550 usb1: usb@47401800 {
551 compatible = "ti,musb-am33xx";
552 status = "disabled";
553 reg = <0x47401c00 0x400
554 0x47401800 0x200>;
555 reg-names = "mc", "control";
556 interrupts = <19>;
557 interrupt-names = "mc";
558 dr_mode = "otg";
559 mentor,multipoint = <1>;
560 mentor,num-eps = <16>;
561 mentor,ram-bits = <12>;
562 mentor,power = <500>;
563 phys = <&usb1_phy>;
564
565 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
566 &cppi41dma 17 0 &cppi41dma 18 0
567 &cppi41dma 19 0 &cppi41dma 20 0
568 &cppi41dma 21 0 &cppi41dma 22 0
569 &cppi41dma 23 0 &cppi41dma 24 0
570 &cppi41dma 25 0 &cppi41dma 26 0
571 &cppi41dma 27 0 &cppi41dma 28 0
572 &cppi41dma 29 0 &cppi41dma 15 1
573 &cppi41dma 16 1 &cppi41dma 17 1
574 &cppi41dma 18 1 &cppi41dma 19 1
575 &cppi41dma 20 1 &cppi41dma 21 1
576 &cppi41dma 22 1 &cppi41dma 23 1
577 &cppi41dma 24 1 &cppi41dma 25 1
578 &cppi41dma 26 1 &cppi41dma 27 1
579 &cppi41dma 28 1 &cppi41dma 29 1>;
580 dma-names =
581 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
582 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
583 "rx14", "rx15",
584 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
585 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
586 "tx14", "tx15";
587 };
588
589 cppi41dma: dma-controller@47402000 {
590 compatible = "ti,am3359-cppi41";
591 reg = <0x47400000 0x1000
592 0x47402000 0x1000
593 0x47403000 0x1000
594 0x47404000 0x4000>;
595 reg-names = "glue", "controller", "scheduler", "queuemgr";
596 interrupts = <17>;
597 interrupt-names = "glue";
598 #dma-cells = <2>;
599 #dma-channels = <30>;
600 #dma-requests = <256>;
601 status = "disabled";
602 };
603 };
604
605 epwmss0: epwmss@48300000 {
606 compatible = "ti,am33xx-pwmss";
607 reg = <0x48300000 0x10>;
608 ti,hwmods = "epwmss0";
609 #address-cells = <1>;
610 #size-cells = <1>;
611 status = "disabled";
612 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
613 0x48300180 0x48300180 0x80 /* EQEP */
614 0x48300200 0x48300200 0x80>; /* EHRPWM */
615
616 ecap0: ecap@48300100 {
617 compatible = "ti,am33xx-ecap";
618 #pwm-cells = <3>;
619 reg = <0x48300100 0x80>;
620 interrupts = <31>;
621 interrupt-names = "ecap0";
622 ti,hwmods = "ecap0";
623 status = "disabled";
624 };
625
626 ehrpwm0: ehrpwm@48300200 {
627 compatible = "ti,am33xx-ehrpwm";
628 #pwm-cells = <3>;
629 reg = <0x48300200 0x80>;
630 ti,hwmods = "ehrpwm0";
631 status = "disabled";
632 };
633 };
634
635 epwmss1: epwmss@48302000 {
636 compatible = "ti,am33xx-pwmss";
637 reg = <0x48302000 0x10>;
638 ti,hwmods = "epwmss1";
639 #address-cells = <1>;
640 #size-cells = <1>;
641 status = "disabled";
642 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
643 0x48302180 0x48302180 0x80 /* EQEP */
644 0x48302200 0x48302200 0x80>; /* EHRPWM */
645
646 ecap1: ecap@48302100 {
647 compatible = "ti,am33xx-ecap";
648 #pwm-cells = <3>;
649 reg = <0x48302100 0x80>;
650 interrupts = <47>;
651 interrupt-names = "ecap1";
652 ti,hwmods = "ecap1";
653 status = "disabled";
654 };
655
656 ehrpwm1: ehrpwm@48302200 {
657 compatible = "ti,am33xx-ehrpwm";
658 #pwm-cells = <3>;
659 reg = <0x48302200 0x80>;
660 ti,hwmods = "ehrpwm1";
661 status = "disabled";
662 };
663 };
664
665 epwmss2: epwmss@48304000 {
666 compatible = "ti,am33xx-pwmss";
667 reg = <0x48304000 0x10>;
668 ti,hwmods = "epwmss2";
669 #address-cells = <1>;
670 #size-cells = <1>;
671 status = "disabled";
672 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
673 0x48304180 0x48304180 0x80 /* EQEP */
674 0x48304200 0x48304200 0x80>; /* EHRPWM */
675
676 ecap2: ecap@48304100 {
677 compatible = "ti,am33xx-ecap";
678 #pwm-cells = <3>;
679 reg = <0x48304100 0x80>;
680 interrupts = <61>;
681 interrupt-names = "ecap2";
682 ti,hwmods = "ecap2";
683 status = "disabled";
684 };
685
686 ehrpwm2: ehrpwm@48304200 {
687 compatible = "ti,am33xx-ehrpwm";
688 #pwm-cells = <3>;
689 reg = <0x48304200 0x80>;
690 ti,hwmods = "ehrpwm2";
691 status = "disabled";
692 };
693 };
694
695 mac: ethernet@4a100000 {
| 537 dma-names = "tx0", "rx0", "tx1", "rx1";
538 status = "disabled";
539 };
540
541 usb: usb@47400000 {
542 compatible = "ti,am33xx-usb";
543 reg = <0x47400000 0x1000>;
544 ranges;
545 #address-cells = <1>;
546 #size-cells = <1>;
547 ti,hwmods = "usb_otg_hs";
548 status = "disabled";
549
550 usb_ctrl_mod: control@44e10620 {
551 compatible = "ti,am335x-usb-ctrl-module";
552 reg = <0x44e10620 0x10
553 0x44e10648 0x4>;
554 reg-names = "phy_ctrl", "wakeup";
555 status = "disabled";
556 };
557
558 usb0_phy: usb-phy@47401300 {
559 compatible = "ti,am335x-usb-phy";
560 reg = <0x47401300 0x100>;
561 reg-names = "phy";
562 status = "disabled";
563 ti,ctrl_mod = <&usb_ctrl_mod>;
564 };
565
566 usb0: usb@47401000 {
567 compatible = "ti,musb-am33xx";
568 status = "disabled";
569 reg = <0x47401400 0x400
570 0x47401000 0x200>;
571 reg-names = "mc", "control";
572
573 interrupts = <18>;
574 interrupt-names = "mc";
575 dr_mode = "otg";
576 mentor,multipoint = <1>;
577 mentor,num-eps = <16>;
578 mentor,ram-bits = <12>;
579 mentor,power = <500>;
580 phys = <&usb0_phy>;
581
582 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
583 &cppi41dma 2 0 &cppi41dma 3 0
584 &cppi41dma 4 0 &cppi41dma 5 0
585 &cppi41dma 6 0 &cppi41dma 7 0
586 &cppi41dma 8 0 &cppi41dma 9 0
587 &cppi41dma 10 0 &cppi41dma 11 0
588 &cppi41dma 12 0 &cppi41dma 13 0
589 &cppi41dma 14 0 &cppi41dma 0 1
590 &cppi41dma 1 1 &cppi41dma 2 1
591 &cppi41dma 3 1 &cppi41dma 4 1
592 &cppi41dma 5 1 &cppi41dma 6 1
593 &cppi41dma 7 1 &cppi41dma 8 1
594 &cppi41dma 9 1 &cppi41dma 10 1
595 &cppi41dma 11 1 &cppi41dma 12 1
596 &cppi41dma 13 1 &cppi41dma 14 1>;
597 dma-names =
598 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
599 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
600 "rx14", "rx15",
601 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
602 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
603 "tx14", "tx15";
604 };
605
606 usb1_phy: usb-phy@47401b00 {
607 compatible = "ti,am335x-usb-phy";
608 reg = <0x47401b00 0x100>;
609 reg-names = "phy";
610 status = "disabled";
611 ti,ctrl_mod = <&usb_ctrl_mod>;
612 };
613
614 usb1: usb@47401800 {
615 compatible = "ti,musb-am33xx";
616 status = "disabled";
617 reg = <0x47401c00 0x400
618 0x47401800 0x200>;
619 reg-names = "mc", "control";
620 interrupts = <19>;
621 interrupt-names = "mc";
622 dr_mode = "otg";
623 mentor,multipoint = <1>;
624 mentor,num-eps = <16>;
625 mentor,ram-bits = <12>;
626 mentor,power = <500>;
627 phys = <&usb1_phy>;
628
629 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
630 &cppi41dma 17 0 &cppi41dma 18 0
631 &cppi41dma 19 0 &cppi41dma 20 0
632 &cppi41dma 21 0 &cppi41dma 22 0
633 &cppi41dma 23 0 &cppi41dma 24 0
634 &cppi41dma 25 0 &cppi41dma 26 0
635 &cppi41dma 27 0 &cppi41dma 28 0
636 &cppi41dma 29 0 &cppi41dma 15 1
637 &cppi41dma 16 1 &cppi41dma 17 1
638 &cppi41dma 18 1 &cppi41dma 19 1
639 &cppi41dma 20 1 &cppi41dma 21 1
640 &cppi41dma 22 1 &cppi41dma 23 1
641 &cppi41dma 24 1 &cppi41dma 25 1
642 &cppi41dma 26 1 &cppi41dma 27 1
643 &cppi41dma 28 1 &cppi41dma 29 1>;
644 dma-names =
645 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
646 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
647 "rx14", "rx15",
648 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
649 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
650 "tx14", "tx15";
651 };
652
653 cppi41dma: dma-controller@47402000 {
654 compatible = "ti,am3359-cppi41";
655 reg = <0x47400000 0x1000
656 0x47402000 0x1000
657 0x47403000 0x1000
658 0x47404000 0x4000>;
659 reg-names = "glue", "controller", "scheduler", "queuemgr";
660 interrupts = <17>;
661 interrupt-names = "glue";
662 #dma-cells = <2>;
663 #dma-channels = <30>;
664 #dma-requests = <256>;
665 status = "disabled";
666 };
667 };
668
669 epwmss0: epwmss@48300000 {
670 compatible = "ti,am33xx-pwmss";
671 reg = <0x48300000 0x10>;
672 ti,hwmods = "epwmss0";
673 #address-cells = <1>;
674 #size-cells = <1>;
675 status = "disabled";
676 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
677 0x48300180 0x48300180 0x80 /* EQEP */
678 0x48300200 0x48300200 0x80>; /* EHRPWM */
679
680 ecap0: ecap@48300100 {
681 compatible = "ti,am33xx-ecap";
682 #pwm-cells = <3>;
683 reg = <0x48300100 0x80>;
684 interrupts = <31>;
685 interrupt-names = "ecap0";
686 ti,hwmods = "ecap0";
687 status = "disabled";
688 };
689
690 ehrpwm0: ehrpwm@48300200 {
691 compatible = "ti,am33xx-ehrpwm";
692 #pwm-cells = <3>;
693 reg = <0x48300200 0x80>;
694 ti,hwmods = "ehrpwm0";
695 status = "disabled";
696 };
697 };
698
699 epwmss1: epwmss@48302000 {
700 compatible = "ti,am33xx-pwmss";
701 reg = <0x48302000 0x10>;
702 ti,hwmods = "epwmss1";
703 #address-cells = <1>;
704 #size-cells = <1>;
705 status = "disabled";
706 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
707 0x48302180 0x48302180 0x80 /* EQEP */
708 0x48302200 0x48302200 0x80>; /* EHRPWM */
709
710 ecap1: ecap@48302100 {
711 compatible = "ti,am33xx-ecap";
712 #pwm-cells = <3>;
713 reg = <0x48302100 0x80>;
714 interrupts = <47>;
715 interrupt-names = "ecap1";
716 ti,hwmods = "ecap1";
717 status = "disabled";
718 };
719
720 ehrpwm1: ehrpwm@48302200 {
721 compatible = "ti,am33xx-ehrpwm";
722 #pwm-cells = <3>;
723 reg = <0x48302200 0x80>;
724 ti,hwmods = "ehrpwm1";
725 status = "disabled";
726 };
727 };
728
729 epwmss2: epwmss@48304000 {
730 compatible = "ti,am33xx-pwmss";
731 reg = <0x48304000 0x10>;
732 ti,hwmods = "epwmss2";
733 #address-cells = <1>;
734 #size-cells = <1>;
735 status = "disabled";
736 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
737 0x48304180 0x48304180 0x80 /* EQEP */
738 0x48304200 0x48304200 0x80>; /* EHRPWM */
739
740 ecap2: ecap@48304100 {
741 compatible = "ti,am33xx-ecap";
742 #pwm-cells = <3>;
743 reg = <0x48304100 0x80>;
744 interrupts = <61>;
745 interrupt-names = "ecap2";
746 ti,hwmods = "ecap2";
747 status = "disabled";
748 };
749
750 ehrpwm2: ehrpwm@48304200 {
751 compatible = "ti,am33xx-ehrpwm";
752 #pwm-cells = <3>;
753 reg = <0x48304200 0x80>;
754 ti,hwmods = "ehrpwm2";
755 status = "disabled";
756 };
757 };
758
759 mac: ethernet@4a100000 {
|
696 compatible = "ti,cpsw";
| 760 compatible = "ti,am335x-cpsw","ti,cpsw";
|
697 ti,hwmods = "cpgmac0";
698 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
699 clock-names = "fck", "cpts";
700 cpdma_channels = <8>;
701 ale_entries = <1024>;
702 bd_ram_size = <0x2000>;
703 no_bd_ram = <0>;
704 rx_descs = <64>;
705 mac_control = <0x20>;
706 slaves = <2>;
707 active_slave = <0>;
708 cpts_clock_mult = <0x80000000>;
709 cpts_clock_shift = <29>;
710 reg = <0x4a100000 0x800
711 0x4a101200 0x100>;
712 #address-cells = <1>;
713 #size-cells = <1>;
714 interrupt-parent = <&intc>;
715 /*
716 * c0_rx_thresh_pend
717 * c0_rx_pend
718 * c0_tx_pend
719 * c0_misc_pend
720 */
721 interrupts = <40 41 42 43>;
722 ranges;
| 761 ti,hwmods = "cpgmac0";
762 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
763 clock-names = "fck", "cpts";
764 cpdma_channels = <8>;
765 ale_entries = <1024>;
766 bd_ram_size = <0x2000>;
767 no_bd_ram = <0>;
768 rx_descs = <64>;
769 mac_control = <0x20>;
770 slaves = <2>;
771 active_slave = <0>;
772 cpts_clock_mult = <0x80000000>;
773 cpts_clock_shift = <29>;
774 reg = <0x4a100000 0x800
775 0x4a101200 0x100>;
776 #address-cells = <1>;
777 #size-cells = <1>;
778 interrupt-parent = <&intc>;
779 /*
780 * c0_rx_thresh_pend
781 * c0_rx_pend
782 * c0_tx_pend
783 * c0_misc_pend
784 */
785 interrupts = <40 41 42 43>;
786 ranges;
|
723 syscon = <&cm>;
| 787 syscon = <&scm_conf>;
|
724 status = "disabled";
725
726 davinci_mdio: mdio@4a101000 {
727 compatible = "ti,davinci_mdio";
728 #address-cells = <1>;
729 #size-cells = <0>;
730 ti,hwmods = "davinci_mdio";
731 bus_freq = <1000000>;
732 reg = <0x4a101000 0x100>;
733 status = "disabled";
734 };
735
736 cpsw_emac0: slave@4a100200 {
737 /* Filled in by U-Boot */
738 mac-address = [ 00 00 00 00 00 00 ];
739 };
740
741 cpsw_emac1: slave@4a100300 {
742 /* Filled in by U-Boot */
743 mac-address = [ 00 00 00 00 00 00 ];
744 };
745
746 phy_sel: cpsw-phy-sel@44e10650 {
747 compatible = "ti,am3352-cpsw-phy-sel";
748 reg= <0x44e10650 0x4>;
749 reg-names = "gmii-sel";
750 };
751 };
752
753 ocmcram: ocmcram@40300000 {
754 compatible = "mmio-sram";
755 reg = <0x40300000 0x10000>; /* 64k */
756 };
757
| 788 status = "disabled";
789
790 davinci_mdio: mdio@4a101000 {
791 compatible = "ti,davinci_mdio";
792 #address-cells = <1>;
793 #size-cells = <0>;
794 ti,hwmods = "davinci_mdio";
795 bus_freq = <1000000>;
796 reg = <0x4a101000 0x100>;
797 status = "disabled";
798 };
799
800 cpsw_emac0: slave@4a100200 {
801 /* Filled in by U-Boot */
802 mac-address = [ 00 00 00 00 00 00 ];
803 };
804
805 cpsw_emac1: slave@4a100300 {
806 /* Filled in by U-Boot */
807 mac-address = [ 00 00 00 00 00 00 ];
808 };
809
810 phy_sel: cpsw-phy-sel@44e10650 {
811 compatible = "ti,am3352-cpsw-phy-sel";
812 reg= <0x44e10650 0x4>;
813 reg-names = "gmii-sel";
814 };
815 };
816
817 ocmcram: ocmcram@40300000 {
818 compatible = "mmio-sram";
819 reg = <0x40300000 0x10000>; /* 64k */
820 };
821
|
758 wkup_m3: wkup_m3@44d00000 {
759 compatible = "ti,am3353-wkup-m3";
760 reg = <0x44d00000 0x4000 /* M3 UMEM */
761 0x44d80000 0x2000>; /* M3 DMEM */
762 ti,hwmods = "wkup_m3";
763 ti,no-reset-on-init;
764 };
765
| |
766 elm: elm@48080000 {
767 compatible = "ti,am3352-elm";
768 reg = <0x48080000 0x2000>;
769 interrupts = <4>;
770 ti,hwmods = "elm";
771 status = "disabled";
772 };
773
774 lcdc: lcdc@4830e000 {
775 compatible = "ti,am33xx-tilcdc";
776 reg = <0x4830e000 0x1000>;
777 interrupt-parent = <&intc>;
778 interrupts = <36>;
779 ti,hwmods = "lcdc";
780 status = "disabled";
781 };
782
783 tscadc: tscadc@44e0d000 {
784 compatible = "ti,am3359-tscadc";
785 reg = <0x44e0d000 0x1000>;
786 interrupt-parent = <&intc>;
787 interrupts = <16>;
788 ti,hwmods = "adc_tsc";
789 status = "disabled";
790
791 tsc {
792 compatible = "ti,am3359-tsc";
793 };
794 am335x_adc: adc {
795 #io-channel-cells = <1>;
796 compatible = "ti,am3359-adc";
797 };
798 };
799
800 gpmc: gpmc@50000000 {
801 compatible = "ti,am3352-gpmc";
802 ti,hwmods = "gpmc";
803 ti,no-idle-on-init;
804 reg = <0x50000000 0x2000>;
805 interrupts = <100>;
| 822 elm: elm@48080000 {
823 compatible = "ti,am3352-elm";
824 reg = <0x48080000 0x2000>;
825 interrupts = <4>;
826 ti,hwmods = "elm";
827 status = "disabled";
828 };
829
830 lcdc: lcdc@4830e000 {
831 compatible = "ti,am33xx-tilcdc";
832 reg = <0x4830e000 0x1000>;
833 interrupt-parent = <&intc>;
834 interrupts = <36>;
835 ti,hwmods = "lcdc";
836 status = "disabled";
837 };
838
839 tscadc: tscadc@44e0d000 {
840 compatible = "ti,am3359-tscadc";
841 reg = <0x44e0d000 0x1000>;
842 interrupt-parent = <&intc>;
843 interrupts = <16>;
844 ti,hwmods = "adc_tsc";
845 status = "disabled";
846
847 tsc {
848 compatible = "ti,am3359-tsc";
849 };
850 am335x_adc: adc {
851 #io-channel-cells = <1>;
852 compatible = "ti,am3359-adc";
853 };
854 };
855
856 gpmc: gpmc@50000000 {
857 compatible = "ti,am3352-gpmc";
858 ti,hwmods = "gpmc";
859 ti,no-idle-on-init;
860 reg = <0x50000000 0x2000>;
861 interrupts = <100>;
|
| 862 dmas = <&edma 52>;
863 dma-names = "rxtx";
|
806 gpmc,num-cs = <7>;
807 gpmc,num-waitpins = <2>;
808 #address-cells = <2>;
809 #size-cells = <1>;
810 status = "disabled";
811 };
812
813 sham: sham@53100000 {
814 compatible = "ti,omap4-sham";
815 ti,hwmods = "sham";
816 reg = <0x53100000 0x200>;
817 interrupts = <109>;
| 864 gpmc,num-cs = <7>;
865 gpmc,num-waitpins = <2>;
866 #address-cells = <2>;
867 #size-cells = <1>;
868 status = "disabled";
869 };
870
871 sham: sham@53100000 {
872 compatible = "ti,omap4-sham";
873 ti,hwmods = "sham";
874 reg = <0x53100000 0x200>;
875 interrupts = <109>;
|
818 dmas = <&edma 36>;
| 876 dmas = <&edma 36 0>;
|
819 dma-names = "rx";
820 };
821
822 aes: aes@53500000 {
823 compatible = "ti,omap4-aes";
824 ti,hwmods = "aes";
825 reg = <0x53500000 0xa0>;
826 interrupts = <103>;
| 877 dma-names = "rx";
878 };
879
880 aes: aes@53500000 {
881 compatible = "ti,omap4-aes";
882 ti,hwmods = "aes";
883 reg = <0x53500000 0xa0>;
884 interrupts = <103>;
|
827 dmas = <&edma 6>,
828 <&edma 5>;
| 885 dmas = <&edma 6 0>,
886 <&edma 5 0>;
|
829 dma-names = "tx", "rx";
830 };
831
832 mcasp0: mcasp@48038000 {
833 compatible = "ti,am33xx-mcasp-audio";
834 ti,hwmods = "mcasp0";
835 reg = <0x48038000 0x2000>,
836 <0x46000000 0x400000>;
837 reg-names = "mpu", "dat";
838 interrupts = <80>, <81>;
839 interrupt-names = "tx", "rx";
840 status = "disabled";
| 887 dma-names = "tx", "rx";
888 };
889
890 mcasp0: mcasp@48038000 {
891 compatible = "ti,am33xx-mcasp-audio";
892 ti,hwmods = "mcasp0";
893 reg = <0x48038000 0x2000>,
894 <0x46000000 0x400000>;
895 reg-names = "mpu", "dat";
896 interrupts = <80>, <81>;
897 interrupt-names = "tx", "rx";
898 status = "disabled";
|
841 dmas = <&edma 8>,
842 <&edma 9>;
| 899 dmas = <&edma 8 2>,
900 <&edma 9 2>;
|
843 dma-names = "tx", "rx";
844 };
845
846 mcasp1: mcasp@4803C000 {
847 compatible = "ti,am33xx-mcasp-audio";
848 ti,hwmods = "mcasp1";
849 reg = <0x4803C000 0x2000>,
850 <0x46400000 0x400000>;
851 reg-names = "mpu", "dat";
852 interrupts = <82>, <83>;
853 interrupt-names = "tx", "rx";
854 status = "disabled";
| 901 dma-names = "tx", "rx";
902 };
903
904 mcasp1: mcasp@4803C000 {
905 compatible = "ti,am33xx-mcasp-audio";
906 ti,hwmods = "mcasp1";
907 reg = <0x4803C000 0x2000>,
908 <0x46400000 0x400000>;
909 reg-names = "mpu", "dat";
910 interrupts = <82>, <83>;
911 interrupt-names = "tx", "rx";
912 status = "disabled";
|
855 dmas = <&edma 10>,
856 <&edma 11>;
| 913 dmas = <&edma 10 2>,
914 <&edma 11 2>;
|
857 dma-names = "tx", "rx";
858 };
859
860 rng: rng@48310000 {
861 compatible = "ti,omap4-rng";
862 ti,hwmods = "rng";
863 reg = <0x48310000 0x2000>;
864 interrupts = <111>;
865 };
866 };
867};
868
869/include/ "am33xx-clocks.dtsi"
| 915 dma-names = "tx", "rx";
916 };
917
918 rng: rng@48310000 {
919 compatible = "ti,omap4-rng";
920 ti,hwmods = "rng";
921 reg = <0x48310000 0x2000>;
922 interrupts = <111>;
923 };
924 };
925};
926
927/include/ "am33xx-clocks.dtsi"
|